A novel unconditionally stable finite-difference time-domain (FDTD) electromagnetic simulation method based on the weighted Laguerre polynomials (WLPs) and isotropic dispersion (ID) finite difference scheme is proposed, which introduces WLPs in the time domain and ID finite difference scheme in the space domain. Based on the analysis of monochrome waves, its numerical dispersion relation is obtained. In order to verify the superiority of this method, an example of plane wave propagation in a 2-D dielectric-loaded cavity is given. Compared with the conventional WLP-FDTD method, this method not only keeps good simulation accuracy but also requires less computing time and memory.

In this letter, the propagation of an electromagnetic (EM) wave in a time-variant medium is treated with a novel methodology stemming from the precise integration time domain (PITD) method. This methodology is a generalized version of the conventional PITD method (thus GPITD, for short). In the GPITD method, the electric displacement and the magnetic induction serve as the iteratively calculated components. In order to overcome the difficulty in implementing the precise integration (PI) routine caused by the time variation of the original coefficient matrix, an effective piecewise constant coefficient matrix is constructed. Both the numerical dispersion relation and the numerical stability condition of the GPITD method are described. Successful application of the GPITD method to solve the EM propagation problem associated with a layer whose permittivity suffers: 1) an abrupt change to a new value and 2) a sinusoidal modulation, confirms its effectiveness.

This letter demonstrates that glide symmetry can be used to match the impedance of highly dense dielectric profiles in wide angle and broad bandwidth. Using glide-symmetric metasurfaces permits tuning the magnetic properties of materials, so high values of permittivity can be matched to free space in wideband. This matching is achieved without disturbing the performance of the device, since the refractive index remains fixed. The performance of the proposed matching method is validated through measurements for normal incidence. For oblique incidence, a hyperbolic dielectric lens is matched with glide-symmetric structures in simulations. These simulations demonstrate a smooth transmission of the fields, manifesting a well-matched profile of the lens.

In this letter, new patterns of symmetric trisection bandpass filter (BPF) with reflection-type half-wave resonators, mixed cross-coupling, and different paths for signal propagation are discussed. The various coordinates of the conductive connection of loads to the end half-wave resonators are used in the filter. This leads to different signal paths from input to output of the filter. Due to the various connections of loads and mixed cross-coupling, satisfying condition $K_{13} = 0$ , the same filter has different frequency responses. When we use one port position, two transmission zeros, located on the $\sigma \! $ -axis of the complex plane $s = \sigma + j\Omega $ , are generated, and we obtain a flat group delay. If another port position is used, two transmission zeros are generated on the $j\Omega $ -axis, $\Omega = (\omega /\omega _{0} - \omega _{0}/\omega)$ /fractional bandwidth (FBW), and a quasi-elliptic response is presented. In both cases, two transmission zeroes are equidistant relative to $s =0$ and they are controlled by a mixed coupling coefficient. The results of the measurements and simulation are presented.

This letter presents the design of mixed quarter- and one-eighth modes substrate integrated waveguide (SIW) bandpass filter (BPF). The transmission zeros (TZs) of the proposed SIW BPF can provide wide stopband response and high selectivity characteristics by using different mode SIW cavities. For validation, two- and three-stage SIW BPFs with Chebyshev response were designed at a center frequency ( $f_{0}$ ) of 8 GHz. The measured results are consistent with the simulations. For two-stage BPF, the insertion loss smaller than 0.9 dB is measured within the passband of 0.65 GHz (7.75–8.4 GHz). The return loss higher than 19.7 dB is measured within the same passband. The spurious is produced at around 18 GHz ( $ < 2.25f_{0}$ ). The stopbands are attenuated more than 17.31 dB from the dc to 5.68 GHz ( $0.71f_{0}$ ) and from 9.28 GHz ( $1.16f_{0}$ ) to 16.67 GHz ( $2.08f_{0}$ ). The TZs are produced at 10 GHz and around 18 GHz due to a small cross-coupling between source/load and the interaction of the higher resonant modes of cavities, respectively. For three-stage BPF, the $\vert S_{21}\vert $ and $\vert S_{11}\vert $ smaller than −1.3 dB and −18 dB are measured within the passband of 7.57–8.45 GHz fractional bandwidth (FBW = 11%), respectively. The TZs are produced at 1.102, 1.9, and $2.39f_{0}$ and provide higher selectivity and attenuation compared to two-stage BPF.

This letter presents the design and fabrication of a 287-GHz resonator and a bandpass filter. The fabrication is conducted using an additive microfabrication process, based on successive photolithography and metal electroplating steps. This process has allowed the fabrication of a single-cavity resonator and a 3.5% relative bandwidth two-pole bandpass filter. The cavity has a measured unloaded $Q$ of 137, and the filter has a measured loss of 4.6 dB and matching better than 20 dB in very good agreement with E-M simulation results.

Spoof surface plasmon polaritons (SSPPs) have been considered as a new-type surface wave transmission line (TL) because of its single line feature. However, it cannot be directly fed by the measured system because the transmission mode of SSPP TLs is totally different from the traditional TLs like microstrip lines. Also, the existing solutions require complicated structures and a big area on the circuit space to complete the transition between the two different propagation modes. Here, we propose an ultracompact and simple transition from the microstrip line to the SSPP single-conductor TL, consisting of a very short section of gradient corrugations and a specially designed flaring ground etched on the bottom side of the SSPP TL. Numerical simulations show a good agreement with the experimental results, showing high transmission efficiency for the proposed transition in a broad relative bandwidth from 4.5 to 11.5 GHz. Moreover, this SSPP feeding prototype is easy to migrate to other single-conductor SSPP devices.

An analog signal-interference dual-narrowband bandpass filter (BPF) by combining transmission lines and surface-acoustic-wave (SAW) resonators is proposed. The filter is based on three-path transversal filtering sections (TFSs) with two embedded one-port SAW resonators. By cascading the TFSs in-series through transmission lines, passbands with enhanced fractional bandwidths (FBWs) (i.e., larger than the electromechanical coupling coefficient $k_{t}^{2}$ of the employed acoustic-wave resonator) can be realized. For the purpose of validation, a two-stage microstrip dual-narrowband BPF with two passbands located at 868.95 and 916.5 MHz has been designed, fabricated, and characterized. It demonstrated an insertion loss (IL) of 0.89 dB at 868.95 MHz, 1.57 dB at 916.5 MHz and a bandwidth (BW) of 3.2 MHz (FBW $=3.21\,\,k_{t}^{2}$ ) at 868.95 MHz, and 2.3 MHz (FBW $=1.92\,\,k_{t}^{2}$ ) at 916.5 MHz.

A fully metallic glide-symmetric waveguide filter with transmission in $Ka$ -band and attenuation at its second harmonic is proposed. The filter is low-loss and cost-effective for high frequencies, and it can be easily integrated with an antenna. Glide symmetry and the possibility of breaking this symmetry provide an additional degree of freedom for passband and stopband control. A new kind of 2-D glide symmetry, referred to as braided glide symmetry, is presented, showing an increased attenuation per unit cell.

This letter presents a varactor-based tunable bandstop filter (BSF) using distributed coupling microstrip resonators with the capacitive terminal. Each distributed coupling microstrip resonator consists of a coupling microstrip line, a varactor, and a capacitive terminal which is a floating pad connected to the cathode of the varactor. The capacitive terminal serves not only as a bias pad for the control voltage but also as an intrinsic capacitive path to ground. Compared to the conventional inductive terminal with the metallized via, the capacitive terminal can be beneficial to realize much higher frequency responses by taking advantage of the capacitance to ground from the floating pad. High stopband suppression level is achieved by cascading multiple distributed coupling microstrip resonators. For demonstration, a tunable BSF prototype with the frequency tuning range of 11.3–16.5 GHz (37%) is designed and fabricated. Measured and simulated results agree well and validate the design principle.

An ultralow-power and low-complexity impulse radio ultrawideband (IR-UWB) transmitter (TX) is fabricated in the low-cost 180-nm United Microelectronics Corporation (UMC) CMOS technology. The TX offers control of the power spectral density (PSD) by using a tunable pulse generator and a controllable switched oscillator. It supports on-off keying (OOK) coding and occupies a total die area of 0.35 mm 2 . The measured results show the transmitter output amplitude of 130 mVp-p with the pulse width of 1.0 ns, and the PSD with 10-dB bandwidth from 3 to 8.8 GHz. The total dc power consumption is 0.6 mW, corresponding to the energy consumption of 3 pJ/pulse at 200-MHz pulse repetition frequency.

A novel broadband RF-to-DC rectifier using an uncomplicated matching approach is proposed and tested. The proposed rectifier is based on a voltage doubler-type configuration and broadband matching is achieved by simply adding two inductors in series with each of the diodes, canceling out the large capacitance inherent in the diodes as well as producing resonances over a wide bandwidth. This uncomplicated matching network allows for a smaller circuit footprint while providing a wide bandwidth. The proposed rectifier is validated via simulation and measurement. The results demonstrate that a rectification efficiency of more than 50% is maintained over a bandwidth of approximately 83% (0.54–1.3 GHz) at 5-dBm input power, with the maximum rectification efficiency of 80% at 10-dBm input power.

A measurement-based approach for the analysis of Doherty power amplifiers (DPAs) is presented. The DPA behavior is emulated using an active load–pull setup, exciting a single device under test (DUT) in either of two states, corresponding to the main and auxiliary branches in a DPA. The dynamic loading condition in one state is determined from the Doherty combiner parameters and the knowledge of the DUT behavior in the other state. By iterating between these states, the measurements converge to the true behavior of a complete DPA. This method provides measurement-based insights in the dynamic loading conditions and the corresponding individual device performance without having to manufacture the full DPA. The method is demonstrated by emulating and cross-verifying a 2.14-GHz DPA.

A 240-GHz direct conversion I–Q receiver with 74-GHz RF bandwidth is reported. It features a mixer-first architecture with fundamental local oscillator (LO)-frequency Gilbert-cell downconversion mixers, variable-gain baseband amplifiers, and a 240-GHz LO source, making it the first fully integrated 240-GHz I–Q receiver. With a phase noise of −82 dBc/Hz at 1-MHz offset, the LO source has a 27-GHz tuning range and consists of a 120-GHz voltage-controlled oscillator (VCO), a frequency doubler, and a static divide-by-128 chain. The measured peak downconversion gain is 23 dB and is adjustable over 38 dB. Along with the IF bandwidth of 59 GHz, the wide RF bandwidth makes it suitable for both high data-rate communication and emerging quantum computing applications. The chip occupies an area of 1.837 mm 2 and consumes 859 mW.

A wideband 65-nm CMOS power amplifier (PA) is presented, with a decade frequency range from 600 MHz to 6.0 GHz. In this frequency range, the output power exceeds 26.6 dBm and the power gain and power-added efficiency (PAE) exceed 18.1 dB and 49%, respectively. For a 7.5-dB peak-to-average-power-ratio (PAPR) long term evolution (LTE) signal at 1.9 GHz, the circuit provides an average output power of 19 dBm, with a PAE of 40%, and an adjacent channel leakage ratio (ACLR) exceeding −31 dBc. In LTE measurements at 5.9 GHz, the average output power, PAE, and ACLR are 18.5 dBm, 38.8%, and −30 dBc, respectively, using supply modulation and baseband predistortion. The wide bandwidth (BW) and high performance are achieved by introducing a dual output topology with an off-chip higher order output-matching network, combined with a positive feedback cross-coupled differential cascode amplifier stage. By using supply modulation and dynamic gate bias with an injection-locked PA, improved back-off efficiency, and acceptable out-of-band and in-band distortion is obtained. The integrated circuit occupies an area of 1.0 $\times $ 0.73 mm 2 in standard 65-nm CMOS technology and uses a supply of 3.0 V.

A compact electrostatic discharge (ESD) protection cell is proposed for multi-band millimeter-wave (MMW) circuits in nanoscale CMOS technology. The proposed ESD protection cell consists of a silicon-controlled rectifier (SCR) and a diode as the main ESD protection devices, and an inductor in this cell is divided into several sections to resonate at multifrequencies. The proposed design has been demonstrated for 28- and 67-GHz applications. The measurement results show that the proposed design exhibits lower loss at the specified frequency bands, higher ESD robustness, and sufficiently small layout area. Therefore, the novel compact ESD protection cell will be better for multi-band MMW applications in CMOS technology.

The threshold is a key indicator of linearity for limiters. However, the threshold of silicon-based p-i-n diode limiters drops rapidly at low frequencies. This letter presents a novel method to improve the threshold of limiters for protecting analog-to-digital converters. A silicon-based p-i-n diode and a zener diode were stacked as a thicker p-i-n diode. Three 30–300-MHz limiters using the same p-i-n diode and different zener diodes were designed. Both the simulated and measured results are presented to verify this method. The results show that the thresholds were improved by 12, 19, and 21 dB, respectively.

Microwave zero-bias rectifiers are fast devices capable of rectifying RF signals without applied bias, which have applications ranging from RF power detection to terahertz imaging systems. In this letter, we present gated nanowire field-effect rectifiers (NW-FERs) fabricated with a process compatible with other RF devices on a standard AlGaN-GaN high electron mobility transistor (HEMT) platform as a new potential RF zero-bias diode. Signal rectification relies on the electrostatic modulation of the gated-NW carrier concentration, which is optimized by a judicious NW width design. NW-FERs presented a large curvature (30.1 V −1 ), close to the theoretical limit (38.7 V −1 ) for ideal Schottky diodes, and an excellent tradeoff between a flat frequency response, up to a few tens of gigahertz, and a large responsivity (3000 V/W). The compatible fabrication process and the very good results provide a promising high-performance zero-bias diode architecture that could be integrated on AlGaN/GaN microwave monolithic integrated circuits (MMICs).

In this letter, an improved balanced Colpitts voltage-controlled oscillator (VCO) with a collector–emitter cross-coupled capacitors is presented. The proposed Colpitts structure can introduce a more robust oscillation startup condition. The noise-shifting technique is used to enhance the loaded quality factor of the tank, which improves the phase noise in turn. In addition, three-bit switches composed of enhancement-mode high-electron mobility transistors (E-HEMTs) are utilized to expand the tuning range and reconfigurability of the proposed VCO. In proof of the concept, a VCO prototype is fabricated in a GaAs BiHEMT [enhancement- and depletion-mode high-electron mobility transistor (E/D-PHEMT)] process. The measured results demonstrate the best phase noise of −139.46 dBc/Hz at 1-MHz offset. To the best of our knowledge, this is the lowest phase noise among the reported ones fabricated on-chip with a similar frequency band, and it achieves a wide tuning frequency bandwidth of 21% (2.65–3.27 GHz) with peak figure of merit (FoM) of −192.26 dB and FOM T of −198.8 dB.

This letter presents a novel monolithic integrated frequency multiplier circuit for free space power generation in the ${W}$ -band (75–110 GHz). The circuit is based on a submicrometer GaAs Schottky diode monolithically integrated with a slot antenna on a GaAs semi-insulating substrate. The fabricated diode with an air-bridged Schottky contact and a U-shaped ohmic contact showed an ideality factor of about 1.25 and a zero bias cutoff frequency higher than 1.25 THz. Using input signals between 15 and 50 GHz, the free space power generated in the ${W}$ -band corresponding to $\times 2$ , $\times 3$ , $\times 4$ , and $\times 5$ frequency multiplication was measured and showed minimum isotropic conversion losses (with antenna) of 11.5, 16.9, 23.7, and 26.4 dB, respectively.

This letter presents a novel compact power amplifier (PA) using the transformer-based quadrature coupler as the power splitter and combiner to achieve a large output power and high gain for automotive radar application. Compared with conventional transmission-line-based power splitter and combiner, the transformer-based quadrature coupler offers a low loss, wide bandwidth, and compact footprint. As a proof of concept, a 77-GHz PA is designed and implemented in a 65-nm CMOS technology. The measured small-signal power gain is 26.4 dB with a 8.5-GHz 3-dB bandwidth from 74 to 82.5 GHz. The measured $P_{\text {sat}}$ , OP 1 dB , and peak power added efficiency (PAE) are 15.82, 11.5 dBm, and 15.9%, respectively. In addition, the saturated output power at 77 GHz is 16.5 dBm at −40 °C and still remains as high as 13.5 dBm at 130 °C, which enables the automotive application. The proposed PA occupies a core area of $270\,\,\mu \text{m}\,\,\times 530\,\,\mu \text{m}$ and the total dc power consumption is 240 mW.

The behavior models based on artificial neural networks (ANNs) have been widely used in the wideband power amplifier (PA). However, the selected terms of the input signal significantly affect the complexity of the ANNs. In this letter, a method using an attention-based deep neural network (DNN) is proposed to reduce the number of selected input terms for PA modeling. This method first selects the input terms with large contributions to PA modeling offline using the DNN with an attention mechanism. Then, the selected input items are injected into the DNN to build the PA model online. Experimental results show that the proposed method requiring only 1/3 of the input items can achieve good modeling performance with low complexity.

This letter presents a vector-modulator phase shifter for low-power and broadband applications operating from 160 to 190 GHz. The component is implemented in a 130-nm SiGe BiCMOS technology featuring a maximum oscillation frequency of 450 GHz. Phase-control methods, inductive peaking, and circuit architecture minimize both the dissipated power ( $P~_{\text {dc}}$ ) for a given insertion loss (IL) and the silicon footprint of the component. A 360° control of the insertion phase is demonstrated for a root-mean-square (rms) IL of 5.5 dB, and a maximum rms error of 1 dB, when the power consumption is 12.4 mW. The core area of the circuit is 0.07 mm 2 . To the best knowledge of the authors, the presented solution achieves the smallest core area together with one of the lowest power consumptions for comparable IL among designs operating above 100 GHz in any fabrication process.

A 915-MHz binary frequency-shift keying (BFSK) transmitter is proposed in this letter. The proposed transmitter architecture allows relaxing the frequency-tuning requirement of the conventional Internet of Things transceiver by the frequency-tripling signal-path topology. The tuning-range requirement is significantly improved down to 4% with the proposed signaling scheme, and this results in the ultralow-power synthesizer implementation. The proposed frequency tripler provides good spur rejection performance, and the adoption of a class-D switching power amplifier (PA) further improves the efficiency of the BFSK transmitter. Implemented in a 55-nm CMOS technology, the proposed transmitter achieves the output power of 5.5 dBm and 31.9% efficiency with only $207~\mu \text{W}$ of power consumption from the synthesizer.

This letter proposes a compact 28-GHz front-end (FE) structure that uses a common-gate (CG) low-noise amplifier (LNA) as a transmit/receive switch. The power amplifier (PA) output shares a dc bias with the CG LNA input. When the shared dc bias is high, the state of the LNA becomes passive, and the LNA operates as a turned-off shunt switch in the transmitter (TX) mode. The proposed CG LNA switch allows high isolation and linearity with a TX path insertion loss of 0.07 dB at 28 GHz. On the contrary, when the shared dc bias is low, the state of the PA becomes passive and it results in a receiver (RX) path insertion loss of 0.51 dB at 28 GHz. The path losses of the CG LNA switch are minimized by the RF floating bodies of the PA and the CG LNA. This is implemented in a 65-nm CMOS process occupying a 0.215-mm 2 core area. The measured saturation power is 15.3 dBm with 25.1% peak power-added efficiency in the TX mode, and the measured noise figure is 4.9 dB in the RX mode.

In this letter, an adaptive basis direct learning (DL) method was proposed for the linearization of power amplifiers (PAs). The proposed method can reduce the complexity and improve the stability performance of DL digital predistortion (DPD) structure. The experimental results show that the proposed method is more stable and can achieve improvement in normalized mean square error (NMSE) and adjacent channel power ratios (ACPRs) compared with the DL. In addition, the proposed method reduces the number of coefficients by 87%.

An improved reconfigurable Doherty power amplifier (DPA) structure with extended bandwidth is presented. A traditional DPA structure is often used to expand the output power back-off (OBO) range by using three transistors, and the peaking amplifiers work in the same frequency band. In this modified structure, the carrier amplifier works in the whole frequency band of $f_{1}$ – $f_{3}$ , and two peaking amplifiers work in $f_{1}$ – $f_{2}$ and $f_{2}$ – $f_{3}$ , respectively ( $f_{1} < f_{2} < f_{3}$ ). In addition, switches are applied in power divider and power combining networks in order to switch peaking amplifier between frequency bands. A 1.8–3.4-GHz DPA has been demonstrated utilizing such a modified structure, and the frequency band is divided into two parts, which are 1.8–2.7 GHz and 2.7–3.4 GHz. The measured results show that 7.2–11.2 dB of saturated gain, 42.2–43.9 dBm of peaking output power, 45%–62.3% and 36.7%–48.5% of drain efficiency at peaking power levels and 6-dB OBO are delivered.

This letter presents a three-stage differential power amplifier (PA) with an adaptive built-in linearizer (ABL) that achieves an enhanced AM–AM linearity. Series inductors are introduced at cascode internodes to improve the output matching conditions of the cascode amplifiers and stabilize a high-gain PA operation. Capacitors at the gate in the common-gate amplifiers at the power stage are used to achieve high differential gain by reducing RF coupling at the virtual ground and equalizing the drain-source voltage swings. Broad-side coupled transmission line transformers are used for all matching networks. It has 25.5-dB peak power gain and 12.2-dBm saturation output power at 110 GHz with 3-dB bandwidth of 92.5 and 117 GHz. It has a core chip size of 0.76 mm 2 and a peak power-added efficiency (PAE) of 8.5%.

A comparator offset immune and area-efficient In-phase and Quadrature (I/Q) mismatch calibration technique is proposed for direct conversion receivers in the letter. Theoretical analysis is provided to explain the independence between comparator offset and error detection accuracy. For verifying the proposed method, a receiver front-end prototype, along with the proposed I/Q mismatch calibration, is designed and fabricated in the 0.18- $\mu \text{m}$ technology. Experimental results show that Image Rejection Ratio (IRR) is 61.99 dB @15 MHz with a comparator offset ranging from 0 to 14 mV. And IRR for a wideband signal from 5 to 25 MHz is enhanced from 31.6 to 43.3 dB after calibration.

Previous studies on orbital angular momentum (OAM) communication mainly considered line-of-sight (LOS) environments. In this letter, however, it is found that OAM communication with high-order modulation can be achieved in highly reverberant environments by combining the OAM multiplexing with a spatial equalizer. The OAM multiplexing exhibits comparable performance of the conventional multiple-input–multiple-output (MIMO) system.

This letter presents a parameter extraction methodology for implementing the Debye model to represent the complex permittivity of liquids at microwave frequencies. Thus, based on an electrical circuit analogy, the parameters associated with different model’s poles as well as with the low-frequency loss are straightforwardly determined through linear regressions. Excellent model–experiment agreement is achieved up to 15 GHz for four different liquid samples.

Many modern and emerging applications; including sensor networks, Internet of Things (IoT), industrial process monitoring, and distributed phased arrays, among others; require high-accuracy localization. Achieving submillimeter accuracy requires wideband waveforms, typically linear frequency-modulated or spread-spectrum waveforms, which limits the use of low-cost commodity hardware such as software-defined radios, which have limited instantaneous bandwidths. In this letter, we demonstrate a novel approach to high-accuracy localization using spectrally sparse waveforms and a dual-channel microwave sensor. We use a dual-tone waveform with low-bandwidth pulse modulation, where each tone is generated and received by a separate transceiver on the two-channel sensor. The individual tones may be separated by any bandwidth up to the operational limitations of the system for increased localization accuracy, while using instantaneously narrowband signals on each channel. We demonstrate localization accuracy of $530~\mu \text{m}$ with tone separations of 450 MHz on a 2-GHz carrier frequency.

In the title paper, the authors proposed the model of the directional coupler using electrical balance based on a pair of coupled lines and presented its analysis. It is shown that the proposed equivalent circuit is incomplete without additional transmission line sections, and the analysis based on it cannot justify the claimed coupler performance or the design equations. A correct circuit model and the design equations are presented for the proposed coupler.

The theory presented by Kumar et al. is based on the assumption that edge-coupled transmission lines (TLs) have infinite even-mode characteristic impedance and is clearly mentioned. Simulation is done to show that better than 10 dB matching can be achieved with a practical TL without using additional TL sections as long as impedance transformed by the even-mode of TL is much lower than the port impedance. The addition of extra quarter-wave TL sections can further improve the matching.

Presents the table of contents for this issue of the publication.

Presents a listing of the editorial board, board of governors, current staff, committee members, and/or society editors for this issue of the publication.

This letter presents a new tuning method for coaxial cavity resonator-based bandpass filters (BPFs). The proposed tuning mechanism lays its foundations on pneumatically-actuated Galinstan that functionalizes the inner conductor of a capacitively-loaded coaxial cavity resonator. By altering the volume of Galinstan (i.e., height of inner conductor), ultrawide (>octave) and low loss RF tuning can be obtained without the need for small capacitive gaps that typically limit the RF performance of coaxial BPFs. To validate the concept, a coaxial cavity resonator with frequency tuning between 2.9 and 9.9 GHz (3.4:1 tuning range), and unloaded quality factor between 120 and 625 was manufactured and measured. Furthermore, the RF performance of a two-pole BPF with: 1) tunable frequency between 3.4 and 7.5 GHz (2.2:1); 2) an intrinsically switched-off state; 3) insertion loss <1 dB; and 4) return loss <10.5 dB was experimentally validated.

A compact phase shifter using substrate integrated waveguide (SIW) with two slots is proposed in this letter. The wideband phase shift is mainly caused by the opposite phase shift slopes produced by the slots and the microstrip delay lines over a wide frequency range. Furthermore, the wide phase shift range (−90° to 90°) can be achieved and be with the same reference line. Compared with the state of the arts, the proposed one gives consideration of the wide bandwidth, wide phase shift range, simple and compact size, and easy-to-make structure, while the SIW counterparts just consider part of the above features. Five prototypes covering the frequency of 26 GHz are designed with the operating bandwidth for 90° ± 5° (−45° ± 2.5°, 45° ± 2.5°, and 90° ± 5°) phase shifter of 26.6% (29.2%, 35.8%, and 39.3%) and the size of $2.29\lambda _{g}^{2}$ ( $2.42\lambda _{g}^{2}$ , $2.71\lambda _{g}^{2}$ , and $2.86\lambda _{g}^{2}$ ; $\lambda _{g}$ is the guided wavelength at the center frequency $f_{0}$ ).

A novel dual-pole dual-throw (DPDT) waveguide switch is proposed for high-power and low-loss applications. The proposed DPDT was designed based on the contactless properties of the gap waveguide technologies in the Ku frequency band. The DPDT was composed of two concentric contactless cylinders. Standard rectangular waveguide ports (WR 75) and waveguide paths are machined in the middle of these cylinders. The rotational movement of the inner cylinder is realized using two bearings in the top and bottom of the DPDT. The proposed structure is fabricated and the measured results are in good agreement with the simulated ones. The measured insertion loss and return loss for the aligned ports are better than 0.1 and 25 dB in the frequency band ranging from 11 to 13.5 GHz, respectively, and the measured isolation between two adjacent ports is better than 60 dB.

Copper frequency-selective surfaces with cross-shaped apertures fabricated by using laser ablation technology are investigated numerically and experimentally. Simulations and measurements are carried out for the $W$ -band range and the central frequency 90 GHz. It is shown that a single Fano resonance (FR) is excited when the symmetry of the aperture elements is violated. This resonance is highly sensitive to the polarization of the incident electromagnetic (EM) wave and geometrical parameters of periodic elements, in particular, the asymmetry of apertures. The EM effect found can be utilized to develop new functional devices of the mm-wave range.

The design of the 77-GHz radar absorbing materials (RAMs) that are suitable for the automotive environment is conducted using a square-patch frequency-selective surface (SP-FSS) on the surface of a grounded dielectric substrate. The inductance ( $L$ ) and capacitance ( $C$ ) of the SP-FSS were determined using the strip wire conductor model and used for determining the resonance frequency and substrate thickness. Impedance matching is satisfied at 77 GHz with a controlled FSS resistance matched to the free-space impedance. The optimized surface resistance of the SP-FSS conductor is $R_{s} = 94\,\,\Omega $ /sq (corresponding to the circuit resistance $R = 377\,\,\Omega$ ) for the lowest reflection loss of −37 dB at 77 GHz. The experimental result with a test sample prepared by the screen printing method is in good agreement with the simulation result and verifies the validity of the proposed design method.

In the above paper, Liu et al . proposed the dual-band impedance transformer based on three sections of the transmission line. However, there is some incorrectness in the design equations and inconsistencies in the derivations. Here, we have provided the corrected design equations.

The author thanks Dr. R. Sinha very much for providing detailed design equations for the proposed dual-band impedance transformer in [1] . Note that the analytical solutions for Z 1 are very necessary, which are developed in [1] , in closed form. In fact, the generalized and closed-form solutions for this kind of impedance transformers have been published in [2] . It is very interesting that all results in [2] can be degenerated to the simple solutions in both [1] and the presented results in the comments by Dr. R. Sinha, when X In = 0 is considered in [2] .

A wideband triple-stacked CMOS distributed power amplifier (DPA) is implemented using a commercial 65-nm CMOS process. To enhance the output power, a triple-stacked field effect transistor (FET) is used as a gain cell in the DPA. Double inductive peaking, in which inductors are inserted at each gate and each interstage of the gain cells, is used to enhance the gain bandwidth. By analyzing the trans-conductance characteristics in the triple-stacked gain cell, interstage inductive peaking (IIP) is used to boost the gain in the mid-band frequency, and gate-inductive peaking (GIP) is used to extend the gain bandwidth in the high-edge frequency. The proposed double inductive peaking ideally enables the gain bandwidth of triple-stacked DPAs to increase from 22 to 44 GHz. The proposed DPA obtains a measured power gain of 11–15.7 dB and a measured output power of 12.8–21.7 dBm from dc to 38 GHz.

This letter presents a general design methodology for compact layout of lumped element radio frequency (RF)/microwave matching networks based on partially overlapped inductors. We demonstrate the compact layout design approach on the output matching network of a TowerJazz 5.8-GHz SiGe power amplifier (PA) IP block fabricated in the 180-nm SBC18QH process. Our redesigned matching network achieves approximately a 20% footprint reduction. Small-signal measurements of PAs with original and compact output matching network designs, respectively, show virtually identical broadband performance.

This letter presents a fully integrated ${K}$ -band high output 1-dB compression point ( $OP_{1\text {dB}}$ ) power amplifier (PA) fabricated in the 90-nm CMOS process. Common-drain (CD) structure is adopted to achieve high $OP_{1\text {dB}}$ . Since the CD structure suffers from the poor stability and power gain, the proposed neutralization technique for the CD amplifier is used to improve both of them simultaneously. The measured results of the proposed PA demonstrate the saturated output power ( $P_{\text {sat}}$ ) of 22.9 dBm with 24.2% peak power-added efficiency (PAE), $OP_{1\text {dB}}$ of 22.5 dBm with 22.5% PAE. To the best of authors’ knowledge, the proposed CD PA is the first CMOS CD PA above 10 GHz.

This letter presents two highly efficient two-stage power amplifiers (PAs) for 5G applications, implemented in a 22-nm slilicon on insulator (SOI) CMOS technology. High efficiency is achieved by carefully designing the power cells and optimizing the layout. Capacitive neutralization is used to improve the stability and the gain. Both PAs are similar except for the use of nMOS neutralization capacitors in the first one. In the second PA, we propose the use of pMOS capacitors instead to enhance significantly both stability and AM–PM linearity at the same time. For both PAs, the saturated output power is 12.7 dBm and $\text{P}_{\mathrm {1\,dB}}$ is 11.9 dBm from a 0.9-V supply at 33 GHz with a power-added efficiency (PAE) at $\text{P}_{\mathrm {1\,dB}}$ of more than 36%. The PAE at $\text{P}_{\mathrm {sat}}$ is 38% and 40% for the PA with nMOS and pMOS neutralizations, respectively. The AM–PM up to $\text{P}_{\mathrm {3\,dB}}$ for the PA with nMOS neutralization is 7°, and for the one with pMOS neutralization, it is less than 1.3° thanks to the proposed technique.

Neural networks (NNs) are efficient techniques for behavioral modeling of power amplifiers (PAs). This letter proposes a genetic algorithm to determine the optimal hyperparameters of the NN model for a PA. Different activation functions are compared. The necessary number of training epochs is also studied to get an optimal solution with a significantly reduced computational complexity. Experimental measurements on a PA with different signals validate the NN models determined by the proposed method.

In this letter, an ultralow phase-noise differential oscillator is proposed using a balanced feedback filter based on quarter stepped-impedance resonators (QSIRs). Phase-noise performance of the designed oscillators can be significantly improved by taking advantage of high peak group delay, improved stopband suppression, and differential configuration of the proposed feedback filter. To verify the hypothesis and compare the phase-noise performance among single-ended and differential oscillators, both the prototypes are designed, fabricated, and measured. The measured results show that the designed single-ended and differential oscillators are operating at 1.953 GHz. The differential oscillator shows not only a good balanced output power of 8.29 dBm with a measured high suppression of 40.07 dB on the second harmonic but also a superior low phase-noise performance of −130.19 dBc/Hz at a frequency offset of 100 kHz. To the best of our knowledge, this is the best phase-noise performance among the state-of-the-art works designed on planar hybrid integrated circuits at a similar frequency range.

In this letter, a mm-wave nMOS-only complementary voltage-controlled oscillator (VCO) is proposed. By replacing the large-sized cross-coupled pMOS pair in the classical complementary VCO structure with smaller and faster nMOS pair employing buffer-reused feedback technique, the parasitic capacitance introduced by the pMOS pair is reduced and the resonant frequency is thus effectively increased. Meanwhile, the negative resistance compensation is enhanced by the feedback reused buffer and the power efficiency is thus improved. The VCO, implemented in 45-nm CMOS SOI technology, occupies an area of 0.038 mm 2 including the buffer and is tunable from 67.4 to 71.2 GHz. The optimum phase noise measured at 69.4 GHz is −94.4 dBc/Hz at 1-MHz offset. The VCO and buffer consume 4.5 mW from a 1-V supply.

This letter presents the improvement of the phase noise (PN) of a voltage-controlled oscillator (VCO) by using a defected ground structure (DGS) resonator with a high-band transmission pole. The proposed DGS resonator has two loops in a coplanar stripline topology. The outer loop is loaded by a series capacitance, which produces the high-band transmission pole. The overall combination has a parallel capacitor to generate the necessary parallel resonance for the VCO operation. This proposed DGS resonator has a sharper impedance and frequency response slope, which results in an improved quality factor. In return, utilization of this DGS resonator into a $K_{U}$ -Band VCO reduces its PN. The prototyped VCO in 0.18- $\mu \text{m}$ CMOS oscillates at 15.52 GHz and shows a PN of −111.27 and −134.07 dBc/Hz at 1- and 10-MHz offset, respectively, while consuming 3.3-mW power. The VCO has a frequency tuning range of 9.5%, which results in a figure of merit (FoM) of −192.7 dB.

This letter presents a 51–73-GHz high-output power and efficiency frequency doubler, which is fabricated in a standard 65-nm CMOS process. The proposed frequency doubler adopts a fourth-order transformer-based balun and a dual- LC tank network to achieve wideband operating at input and output ports. In addition, a common-source amplifier with a Gm-boosting technique is used as an output buffer to improve the output power and efficiency. The measured results show that the doubler achieves input and output return losses below −10 dB from 26 to 36 GHz and 53 to 80 GHz, respectively. The measured maximum gain is 0.8 dB at 66 GHz with 22-GHz 3-dB gain bandwidth at an input power of 1 dBm. Furthermore, with an input power of 7 dBm, the proposed doubler also exhibits a high efficiency of 19.5% and an output power of 5.7 dBm at 66 GHz. The dc power consumption is 14 mW with 1-V power supply, and the chip size is $0.63\times0.52$ mm 2 including all test pads.

This letter presents an injection-locked frequency octupler (ILFO) fabricated using a 100-nm GaAs pHEMT. A frequency quadrupler, followed by an injection-locked push–push oscillator, is employed to achieve a high multiplication factor of eight with a simple structure. Compared to conventional amplifier-multiplier chains, the proposed structure is advantageous for dc power and chip area consumption, phase noise, and circuit stability. The high multiplication factor allows the use of a low-frequency, high-performance, phase-locked-loop (PLL) as input. The ILFO achieves a locking range from 90.5 to 95.2 with 1-dBm input power. The output power is measured to be −0.4 dBm at 91.2 GHz. The phase-noise degradation from the input source to the output is 19.7 dB at 100-kHz offset.

A pattern reconfigurable rectenna, consisting of a pattern reconfigurable receiving antenna and a low-/medium-power rectifying circuit, is proposed for microwave power transmission with multiple transmitting antennas. By controlling the states of p-i-n switch groups, the receiving antenna can work at one omni-directional mode and eight directional modes with flattened wide main beams for the arbitrary direction of incoming waves. In order to achieve good impedance matching at different modes, where the received power fluctuates severely, a complex impedance compression network (CICN) is introduced to the rectifying circuit. Since the proposed rectenna has a versatile structure, it can be used for multiple transmitting antennas in conformity with the incoming waves’ direction.

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This Letter presents a scattered-field formulation for modeling dispersive media using the finite-difference time-domain (FDTD) method. Specifically, the auxiliary differential equation method is applied to Drude and Lorentz media for a scattered field FDTD model. The present technique can also be applied in a straightforward manner to Debye media. Excellent agreement is achieved between the FDTD-calculated and exact theoretical results for the reflection coefficient in half-space problems.

We demonstrate a technique that automatically tunes the sensitivity of a radio-frequency (RF) interferometer with a tunable liquid attenuator by accurately changing its liquid volume. The obtained effective quality factor (QEFF ) of the interferometer is up to 1×108 at ~5 GHz. The QEFF is ~100 times higher than previously reported results. When material-under-test (MUT), i.e., methanol-water solution in this work, is used for the tuning, a self-calibration and measurement process is demonstrated from 2 GHz to 7.5 GHz at a methanol concentration level down to 5×10-5 mole fraction, which is 100 times lower than previously reported results. Further investigations are needed to achieve better system stability and higher sensitivity.

A highly tunable and sensitive radio-frequency (RF) sensor is presented for the measurement of aqueous-solution dielectric properties. Two quadrature hybrids are utilized to achieve destructive interference that eliminates the probing signals at both measurement ports. As a result, weak signals of material-under-test (MUT) are elevated for high sensitivity detections at different frequencies. The sensor is demonstrated through measuring 2-propanol-water solution permittivity at 0.01 mole fraction concentration level from ~4 GHz to ~12 GHz. De-ionized water and methanol-water solution are used to calibrate the sensor for quantitative MUT analysis through our proposed model. Micro-meter coplanar waveguides (CPW) are fabricated as RF sensing electrodes. A polydimethylsiloxane (PDMS) microfluidic channel is employed to introduce 250 nL liquid, of which ~1 nL is effectively the MUT. The permittivity and the relaxation time of 2-propanol-water solution are obtained. Compared with our power divider based sensors, the differential reflection coefficients in this work provide additional information that complements the transmission coefficient methods.

We present results for the successful fabrication of low-loss THz metallic waveguide components using direct machining with a CNC end mill. The approach uses a split-block machining process with the addition of an RF choke running parallel to the waveguide. The choke greatly reduces coupling to the parasitic mode of the parallel-plate waveguide produced by the split-block. This method has demonstrated loss as low as 0.2 dB/cm at 280 GHz for a copper WR-3 waveguide. It has also been used in the fabrication of 3 and 10 dB directional couplers in brass, demonstrating excellent agreement with design simulations from 240-260 GHz. The method may be adapted to structures with features on the order of 200 μm.