The latest advances in optoelectronic devices are helping to increase the response speed of displays and improve synchronization across computing networks.

The researchers — who are based at the Institute of Science and Technology Austria — printed p-type and n-type thermoelectric legs using colloidal suspensions as inks. The ink formulation was tailored to facilitate the formation of interfacial bonding between the solid particles during the removal of the liquid media. At room temperature, printed p-type bismuth antimony telluride ((Bi,Sb)2Te3) achieved

The researchers — who are based at Zhejiang University and the University of Cambridge — fabricated the pixels using lithography techniques to create localized electrical contacts that define the active pixels and prevent non-radiative losses at the boundaries. This results in pixels with external quantum efficiencies of around 20% for pixel lengths down to 3.5 μm and between 5% and 10% for smaller

Correction to: Nature Electronics https://doi.org/10.1038/s41928-025-01357-7, published online 10 March 2025.

Solution-processed 2D materials could be of use in the development of large-area electronic applications, but the performance of devices based on such materials remains an issue.

The researchers — who are based at Osaka University, the National Institute for Materials Science, the University of Tsukuba and the University of Southern California — fabricated a 16-channel membrane-type surface-stress sensor for gas sensing. By varying the receptor material coated on top of each membrane, multiple gas sources could be differentiated. The terminals of the sensor array were vertically

The researchers — who are based at KIOXIA and SK hynix — demonstrate reliable operation of the cross-point cells with a read pulse of 3 ns and read margin of 4σ, and a write pulse of 15 ns. To suppress read disturbances caused by parasitic capacitance, a local-capacitor mode — based on a n-type metal–oxide–semiconductor (NMOS) transistor — was added that converts the read signal voltage into a current

The researchers — who are based at the University of Electronic Science and Technology of China, Southern University of Science and Technology, and Chengdu Data Automation System Technologies — fabricated a chip using a 65 nm CMOS process with two digital-to-analogue (DAC) converters, which control the gate and source of the single-electron transistor. When generating a static output voltage, the chip

The macro relies on a hybrid combination of near-memory computing to compute the mean and in-memory computing for the difference from the mean. By using this method, the researchers — who are based at National Tsing Hua University and TSMC — can achieve high energy efficiency and inference accuracy while effectively handling the smaller write margins for difference from the mean values (which are typically

Artificial intelligence models continue to advance rapidly, but questions about energy consumption remain, increasing the need for new energy-efficient hardware.

Correction to: Nature Electronics https://doi.org/10.1038/s41928-024-01197-x, published online 17 July 2024.

The researchers — who are based at Cornell University — fabricated a series of silicon photodiodes on a silicon wafer with standard fabrication techniques. Twenty-five photodiodes were connected as one device, and each device was placed in a microtitre plate well to power the electrochemical reaction under illumination of visible light. More than 1,500 devices were fabricated on a 4-inch wafer with

The researchers — who are based at the University of Science and Technology Beijing — created a two-dimensional liquid precursor film on a molten glass substrate using the etching reaction between oxygen and a pre-deposited polycrystalline MoS2 film and an annealing process, followed by an ultrafast sulfuration process. The single crystalline domains can reach a scale of 1.5 cm with a defect density

The researchers — who are based at the Chinese Academy of Sciences, University of Science and Technology of China and Jilin University — grew the perovskite using chemical vapour deposition on a sapphire substrate with a graphene interlayer. Because of the small lattice mismatch with sapphire, perovskite with an area of 4 cm2 can be grown without observable defects or grain boundaries and then exfoliated

Quantum computing is our 2025 technology of the year.

The researchers — who are based at various institutions in China and Germany — start with a CVD-grown diamond membrane on a silicon substrate and crop the wafer edge. Using the exposed diamond–substrate edge, the membrane could then be exfoliated using Scotch tape and a peeling machine. The method can create diamond membranes up to 2 inches wide and with an average roughness of the bottom surface under

The researchers — who are based at imec, KU Leuven and Ghent University — grew GaAs with low defectivity in high-aspect-ratio trenches directly on a ridged silicon wafer. Nano-ridge structures, containing an embedded p–i–n heterojunction and three InGaAs quantum wells (which act as the gain region of the laser), were then grown on top of the GaAs. More than 300 laser diodes were tested on the wafer

The researchers — who are based at the Massachusetts Institute of Technology, the Samsung Advanced Institute of Technology, Sungkyunkwan University and the University of Texas at Dallas — show that confined selective growth of transition metal dichalcogenides can be used to integrate n-type field-effect transistors based on molybdenum disulfide on top of p-type field-effect transistor arrays based