This paper presents a pipelined noise-shaping SAR (PLNS-SAR) ADC for high SNDR, wide bandwidth, and low power consumption. The proposed design achieves a sharp second-order NTF of an error feedback structure, without a multi-input comparator and additional residue amplifier. Additionally, the SNDR is improved via zero optimization. Additionally, the speed is enhanced via prediction logic and alternately using the passive switched capacitor FIR filter. This consequently achieves the high-power efficiency of the ADC. The simulated SNDR is 79.97 dB; it achieves a 12.5-MHz BW at a 175-MHz sampling rate, with OSR of 7. The total power consumption of the ADC is 4.27 mW at a 1.1-V supply. The is 174.6 dB. The proposed structure achieves high resolution and wide bandwidth with good energy efficiency.

中文翻译：

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使用误差反馈结构的二阶流水线噪声整形 SAR ADC

本文介绍了一种用于高 SNDR、宽带宽和低功耗的流水线噪声整形 SAR (PLNS-SAR) ADC。所提出的设计实现了误差反馈结构的锐利二阶 NTF，无需多输入比较器和额外的剩余放大器。此外，通过零优化改进了 SNDR。此外，速度通过预测逻辑和交替使用无源开关电容器 FIR 滤波器来提高。因此，这实现了 ADC 的高功率效率。模拟的 SNDR 为 79.97 dB；它以 175MHz 的采样率实现 12.5MHz 的带宽，OSR 为 7。在 1.1V 电源下，ADC 的总功耗为 4.27mW。为 174.6 分贝。所提出的结构实现了高分辨率和宽带宽以及良好的能量效率。