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A Novel Nanoscale SOI MOSFET by Using a P-N Junction and an Electrically Hole Free Region to Improve the Electrical Characteristics
Silicon ( IF 2.8 ) Pub Date : 2021-09-12 , DOI: 10.1007/s12633-021-01304-z
S. Amir Bozorgi 1 , Ali A. Orouji 1 , Abdollah Abbasi 1
Affiliation  

In this paper, a SOI MOSFET is proposed using a P-N structure and an electrically hole-free region (EHFR-SOI). In this structure, to improve the electrical characteristics such as short channel effects, self-heating effects, and floating body effects, a Si3N4 layer is used on the source side of the SOI MOSFET with a P-N structure. The proposed technique converts the P-N structure to a N-P-N structure by creating an electrically hole-free region. So, by reducing the applied electric field to the carriers, a significant reduction in the electron temperature of the device will be created. Simulations and studies of the structure show that its thermal behavior is significantly improved. Also, the floating body effect, effective mobility, hot electron effect, and electric field in the structure are enhanced compared to a conventional SOI (C-SOI) structure. In addition, the gate-source and gate-drain capacitors have been improved, which indicates a higher switching speed of the structure.



中文翻译:

一种新型纳米级 SOI MOSFET,通过使用 PN 结和无电空洞区域来改善电气特性

在本文中,提出了使用 PN 结构和无电孔区 (EHFR-SOI) 的 SOI MOSFET。在这种结构中,为了改善电特性,如短沟道效应,自加热效应,和浮体效应,在Si 3 Ñ 4层在SOI MOSFET的源极侧使用PN 结构。所提出的技术通过创建无电空穴区域将 PN 结构转换为 NPN 结构。因此,通过减少施加到载流子的电场,器件的电子温度将显着降低。对该结构的模拟和研究表明,其热性能得到显着改善。此外,与传统的 SOI (C-SOI) 结构相比,该结构中的浮体效应、有效迁移率、热电子效应和电场都得到了增强。此外,栅源和栅漏电容得到了改进,这表明结构的开关速度更高。

更新日期:2021-09-13
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