In this work we analysed the stepwise charging technique to find the limits from which it is beneficial in terms of load capacitance and charge–discharge frequency. We included in the analysis practical limitations such as the consumption of auxiliary logic needed to implement the technique and the minimum size of auxiliary switches imposed by the technology. We proposed an ultra-low-power logic block to push these limits and to obtain benefits from this technique in small capacitances. Finally, we proposed to use a stepwise driver in the driving of the gate capacitance of power switches in switched-capacitor (SC) DC–DC converters. We designed and manufactured, in a 130 nm process, a SC DC–DC converter and measured a 29% energy reduction in the gate-drive losses of the converter. This accounts for an improvement of 4% (from 69 to 73%) in the overall converter efficiency.

在这项工作中，我们分析了逐步充电技术，以找出在负载电容和充放电频率方面有益的极限。我们在分析中包括了实际限制，例如实施该技术所需的辅助逻辑消耗以及该技术施加的最小辅助开关尺寸。我们提出了一种超低功耗逻辑模块，以突破这些限制并在小电容中从该技术中受益。最后，我们建议在开关电容器（SC）DC-DC转换器中使用步进驱动器来驱动功率开关的栅极电容。我们以130 nm工艺设计和制造了一个SC DC-DC转换器，并测量了该转换器栅极驱动损耗的能耗降低了29％。