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A New Low Power Schema for Stream Processors Front-End with Power-Aware DA-Based FIR Filters by Investigation of Image Transitions Sparsity
Circuits, Systems, and Signal Processing ( IF 1.8 ) Pub Date : 2021-01-28 , DOI: 10.1007/s00034-020-01632-2
Seyedeh Fatemeh Ghamkhari , Mohammad Bagher Ghaznavi-Ghoushchi

Data stream processors and accelerators, due to the outstanding energy performance, run on hardware more than any time in modern designs. The general model for these processors comprises massive shift register arrays with the largest share in energy dissipation and processing elements (PE). In this paper, a new gated flip-flop is designed and utilized in shift register arrays, to decrease power consumption. Distributed arithmetic (DA) is an efficient method for calculating the inner product and FIR filters. DA-based FIR filter consists of two parts of shift register and PE array. Due to the significant share of power in shift register, in this paper, DA-based FIR filter is employed to show the improvement of the proposed gated flip-flop. Investigation of statistical properties of input in image processing applications, utilization of implicit clock gating, and multi-vdd techniques are three main approaches we used in this study to increase energy efficiency. It is shown that the transition density (TD) in 50% of static images of target databases is lower than 0.5. A set of random data with different TDs is generated, fed to the gated flip-flop in 180 nm technology, and the results show a 62–2% improvement in dynamic power consumption. Further optimization of 29–21% is achieved when the multi-vdd is applied on the wrapper circuit of the gated flip-flop. Likewise, using the proposed flip-flop in the shift register unit of the DA-based FIR filter has improved the power consumption by 15–40% compared to the conventional flip-flop.



中文翻译:

通过研究图像过渡稀疏性,为具有基于功率感知DA的FIR滤波器的流处理器前端提供一种新的低功耗方案

由于出色的能源性能,数据流处理器和加速器在硬件上运行的时间比现代设计中的任何时候都要多。这些处理器的通用模型包括大量的移位寄存器阵列,这些阵列在能耗和处理元件(PE)中占有最大份额。在本文中,设计了一种新的门控触发器,并将其用于移位寄存器阵列,以降低功耗。分布式算术(DA)是计算内积和FIR滤波器的有效方法。基于DA的FIR滤波器由移位寄存器和PE阵列两部分组成。由于移位寄存器中功率的显着份额,本文采用基于DA的FIR滤波器来说明所提出的门控触发器的改进。调查图像处理应用程序中输入的统计属性,利用隐式时钟门控和多vdd技术是我们在这项研究中用来提高能源效率的三种主要方法。结果表明,目标数据库的50%静态图像中的过渡密度(TD)低于0.5。产生了一组具有不同TD的随机数据,并以180 nm技术馈入了门控触发器,结果表明动态功耗降低了62–2%。当多vdd应用于门控触发器的封装电路时,可实现29-21%的进一步优化。同样,在基于DA的FIR滤波器的移位寄存器单元中使用拟议的触发器,与传统触发器相比,功耗降低了15–40%。结果表明,目标数据库的50%静态图像中的过渡密度(TD)低于0.5。产生了一组具有不同TD的随机数据,并以180 nm技术馈入了门控触发器,结果表明动态功耗降低了62–2%。当多vdd应用于门控触发器的封装电路时,可实现29-21%的进一步优化。同样,在基于DA的FIR滤波器的移位寄存器单元中使用拟议的触发器,与传统触发器相比,功耗降低了15–40%。结果表明,目标数据库的50%静态图像中的过渡密度(TD)低于0.5。产生了一组具有不同TD的随机数据,并以180 nm技术馈入了门控触发器,结果表明动态功耗降低了62–2%。当多vdd应用于门控触发器的封装电路时,可实现29-21%的进一步优化。同样,在基于DA的FIR滤波器的移位寄存器单元中使用拟议的触发器,与传统触发器相比,功耗降低了15–40%。将多重vdd应用于门控触发器的封装电路时,可以实现29-21%的进一步优化。同样,在基于DA的FIR滤波器的移位寄存器单元中使用拟议的触发器,与传统触发器相比,功耗降低了15–40%。当多vdd应用于门控触发器的封装电路时,可实现29-21%的进一步优化。同样,在基于DA的FIR滤波器的移位寄存器单元中使用拟议的触发器,与传统触发器相比,功耗降低了15–40%。

更新日期:2021-01-28
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