当前位置: X-MOL 学术Circuits Syst. Signal Process. › 论文详情
Our official English website, www.x-mol.net, welcomes your feedback! (Note: you will need to create a separate account there.)
A Low Area FPGA Implementation of Reversible Gate Encryption with Heterogeneous Key Generation
Circuits, Systems, and Signal Processing ( IF 1.8 ) Pub Date : 2021-01-22 , DOI: 10.1007/s00034-021-01649-1
K. Saranya , K. N. Vijeyakumar

The reversible computation is the process of designing the architecture with reversible logic gates (RLG) and applicable for optical computing, digital signal processing, nanotechnologies and low-power circuits. In this study, integer wavelet transform (IWT) compression technique is applied to the input image to compress the pixel value. The utilization of the IWT is used to improve the quality of the image in terms of peak signal-to-noise ratio (PSNR) and structural similarity index matrix (SSIM). In addition, different types of RLGs are used to perform the encryption and decryption of the images. A random number is generated using the Lorenz chaotic system (LCS) that contains three different stages and each stage is developed using arithmetic blocks. Here, an effective key value is generated from the input image values by connecting the LCS’s output with the heterogeneous key generation (HKG) module. The inverse IWT (IIWT) technique is used to retrieve the original data during execution of decryption operation. Application specific integrated circuit and field-programmable gate array (FPGA) performances are calculated for reversible logic cryptographic design (RLCD) IWT-HKG architecture. The results showed that it has achieved better performance compared to conventional methods. Moreover, security analyses such as avalanche effect, side channel attack and session key agreement are performed for the RLCD-IWT-HKG method. The RLCD-IWT-HKG method has achieved 89 LUTs, 52 flip flops and 31 slices for the Virtex 6 FPGA device. After retrieving the decrypted images, values of PSNR and SSIM are evaluated as 39.90 dB and 0.6874, respectively.



中文翻译:

具有异构密钥生成的可逆门加密的低区域FPGA实现

可逆计算是使用可逆逻辑门(RLG)设计架构的过程,适用于光学计算,数字信号处理,纳米技术和低功耗电路。在这项研究中,将整数小波变换(IWT)压缩技术应用于输入图像以压缩像素值。IWT的利用可提高峰值信噪比(PSNR)和结构相似性指标矩阵(SSIM)的图像质量。此外,不同类型的RLG用于执行图像的加密和解密。使用包含三个不同阶段的洛伦兹混沌系统(LCS)生成一个随机数,并且每个阶段都使用算术模块进行开发。这里,通过将LCS的输出与异构密钥生成(HKG)模块连接,可以从输入图像值生成有效的密钥值。反向IWT(IIWT)技术用于在执行解密操作期间检索原始数据。针对可逆逻辑密码设计(RLCD)IWT-HKG体系结构,计算了专用集成电路和现场可编程门阵列(FPGA)的性能。结果表明,与常规方法相比,它具有更好的性能。此外,针对RLCD-IWT-HKG方法执行了雪崩效应,边信道攻击和会话密钥协商之类的安全性分析。RLCD-IWT-HKG方法为Virtex 6 FPGA器件实现了89个LUT,52个触发器和31个切片。检索解密的图像后,

更新日期:2021-01-22
down
wechat
bug