Silicon nanowire (SiNW) structures are the essential foundations of the next generation highly efficient and lowcost electronic devices because of their specific chemical, optical, and electrical properties. In recent decades, the production of pure Si NW arrays with the ability to tune the wire density and dimensions has been intensively studied. This paper demonstrates the performance of silicon nanowire (Si NW) array based cylindrical gate all around (GAA) MOSFET using quantum transport model in lower technology nodes. With an improvement in drain current and lower value of threshold voltage, the proposed structure is proving itself as one of the leaders in GAA MOSFET family. Again the study includes the effect of variation in gate voltage on the electrostatic potential of individual nanowires and the potential developed at the channel-source/drain interface. The improved ON current with superior electrostatic integrity due to silicon pillars is showing the possibility of this device towards future development in CMOS technology. Finally, the article includes the integration of nMOS and pMOS to realize the CMOS inverter for high speed and noise immune characteristics.

硅纳米线（SiNW）结构具有特殊的化学，光学和电学性质，是下一代高效，低成本电子设备的基本基础。在最近的几十年中，已经对具有调整线密度和尺寸的能力的纯Si NW阵列的生产进行了深入研究。本文使用量子传输模型在较低技术节点中演示了基于硅纳米线（Si NW）阵列的圆柱形栅极全能（GAA）MOSFET的性能。随着漏极电流的改善和阈值电压值的降低，所提出的结构证明自己是GAA MOSFET系列的领导者之一。同样，这项研究包括栅极电压变化对单个纳米线静电势的影响以及在沟道-源极/漏极界面处产生的电势。由于硅柱的作用，具有更好的静电完整性的改善的导通电流表明该器件有可能朝着CMOS技术的未来发展发展。最后，本文包括nMOS和pMOS的集成，以实现具有高速和抗噪声特性的CMOS反相器。