The current method of designing robust digital circuits requires running analysis and simulations over multiple process-voltage-temperature (PVT) points to meet the design specifications. However, in small-delay defect (SDD) testing, the computation of the SDD test quality uses a single PVT point. This makes it less accurate to describe the test quality for chips that operate under a different point. In this paper we explore the idea of calculating the SDD quality metric over multiple PVT points using multiple SDD test quality metrics including our previously proposed metric, the weighted slack percentage (WeSPer). The results are obtained by running extensive simulations with a CMOS 28nm technology and calculating the different SDD test quality metrics under 54 different PVT points, 3 test speeds and 2 different types of test patterns for 14 benchmark circuits. The results are then analyzed and compared with respect to the test-escape window size. The comparison shows that WeSPer is the most responsive SDD test quality metric to the change in the test-escape window size. Since the simulation of 54 PVT points and the delay information extraction can be lengthy, this paper also shows two methods of estimating WeSPer across all PVT points by either predicting the results using only 3 PVT points or by considering the worst case scenario.

中文翻译：

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近期小延迟缺陷质量指标的多 PVT 点分析和比较

当前设计稳健数字电路的方法需要在多个工艺电压温度 (PVT) 点上运行分析和仿真，以满足设计规范。但是，在小延迟缺陷 (SDD) 测试中，SDD 测试质量的计算使用单个 PVT 点。这使得描述在不同点下运行的芯片的测试质量不太准确。在本文中，我们探讨了使用多个 SDD 测试质量指标（包括我们之前提出的指标、加权松弛百分比 (WeSPer)）计算多个 PVT 点上的 SDD 质量指标的想法。结果是通过使用 CMOS 28nm 技术运行大量模拟并计算 54 个不同 PVT 点下的不同 SDD 测试质量指标而获得的，3 种测试速度和 2 种不同类型的测试模式，适用于 14 个基准电路。然后对结果进行分析并与测试逃逸窗口大小进行比较。比较表明，WeSPer 是对测试转义窗口大小变化响应最快的 SDD 测试质量指标。由于 54 个 PVT 点的模拟和延迟信息提取可能很长，本文还展示了两种估计所有 PVT 点的 WeSPer 的方法，方法是仅使用 3 个 PVT 点预测结果或考虑最坏的情况。