This paper investigates the digital performance of novel charge plasma based complementary (CPJL) FinFET inverters in terms of low and high noise margins, logic swing LS, DC power consumption P_DC, rise t_r and fall t_f times, and propagations delay at both 10 and 7 nm technology nodes. In addition, their performance is compared with equivalent junctionless (JL) CFinFET inverters. Obtained results are physically analyzed including quantum–mechanical effects. Furthermore, the oscillation frequency of a three-stage ring oscillator constructed with CPJL-CFinFETs is computed, and compared with their JL-CFinFET counterpart. Our findings reveal that while dissipating less OFF-state power, t_r and t_f of the proposed CPJL inverter exhibit significant reduction of ~73.92% and ~79.82%, respectively, relative to its equally sized JL inverter value at 10 nm technology node. Moreover, the oscillation frequency of a three-stage ring oscillator (RO) built with CPJL inverters exhibits ~323.75% enhancement compared to its JL RO at 10 nm node.

本文研究的基于新颖电荷等离子体的数字性能互补（CPJL）的FinFET在低和高噪声容限，逻辑摆动LS，DC功耗P方面的逆变器_DC，上升吨_{- [R}和下降吨_˚F倍，传递方向在两个延迟10和7 nm技术节点。此外，它们的性能可以与等效的无结（JL）CFinFET反相器进行比较。对获得的结果进行物理分析，包括量子力学效应。此外，计算出由CPJL-CFinFET构成的三级环形振荡器的振荡频率，并将其与JL-CFinFET的对应频率进行比较。我们的发现表明，虽然耗散的关态功率较小，但t _r和t _f相对于其在10 nm技术节点处的JL反相器的均等值，所建议的CPJL反相器的LP分别显着降低了〜73.92％和〜79.82％。此外，与CPJL反相器一起构建的三级环形振荡器（RO）的振荡频率与其在10 nm节点处的JL RO相比，显示出〜323.75％的增强。