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Correlated Time-0 and Hot-Carrier Stress Induced FinFET Parameter Variabilities: Modeling Approach.
Micromachines ( IF 3.0 ) Pub Date : 2020-06-30 , DOI: 10.3390/mi11070657
Alexander Makarov 1 , Philippe Roussel 2 , Erik Bury 2 , Michiel Vandemaele 2, 3 , Alessio Spessot 2 , Dimitri Linten 2 , Ben Kaczer 2 , Stanislav Tyaginov 1, 2, 4
Affiliation  

We identify correlation between the drain currents in pristine n-channel FinFET transistors and changes in time-0 currents induced by hot-carrier stress. To achieve this goal, we employ our statistical simulation model for hot-carrier degradation (HCD), which considers the effect of random dopants (RDs) on HCD. For this analysis we generate a set of 200 device instantiations where each of them has its own unique configuration of RDs. For all “samples” in this ensemble we calculate time-0 currents (i.e. currents in undamaged FinFETs) and then degradation characteristics such as changes in the linear drain current and device lifetimes. The robust correlation analysis allows us to identify correlation between transistor lifetimes and drain currents in unstressed devices, which implies that FinFETs with initially higher currents degrade faster, i.e. have more prominent linear drain current changes and shorter lifetimes. Another important result is that although at stress conditions the distribution of drain currents becomes wider with stress time, in the operating regime drain current variability diminishes. Finally, we show that if random traps are also taken into account, all the obtained trends remain the same.

中文翻译:

相关时间-0和热载流子应力引起的FinFET参数变异:建模方法。

我们确定原始n通道FinFET晶体管中的漏极电流与由热载流子应力引起的时间0电流变化之间的相关性。为了实现此目标,我们采用了热载流子退化(HCD)的统计仿真模型,该模型考虑了随机掺杂物(RDs)对HCD的影响。为了进行此分析,我们生成了一组200个设备实例,其中每个实例都有其自己独特的RD配置。对于该集合中的所有“样本”,我们计算时间为0的电流(即未损坏的FinFET中的电流),然后计算退化特性,例如线性漏极电流和器件寿命的变化。健壮的相关分析使我们能够确定无应力器件中晶体管寿命与漏极电流之间的相关性,这意味着具有较高电流的FinFET退化得更快,即 具有更显着的线性漏极电流变化和更短的使用寿命。另一个重要的结果是,尽管在应力条件下,漏极电流的分布随应力时间而变宽,但在工作状态下,漏极电流的可变性减小了。最后,我们表明,如果还考虑随机陷阱,则所有获得的趋势都将保持不变。
更新日期:2020-06-30
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