A new low-power Si_1−xGe_x pocket junctionless single-gate tunnel field-effect transistor (JLSGTFET) is designed to achieve steep subthreshold performance and a better I_ON/I_OFF ratio (∼ 10⁸) in sub-20-nanometer technology node. The mole fraction of Ge represented by x is kept at 0.3 for the SiGe pocket region. The proposed JLSGTFET shows better performance with a Ge mole fraction value x = 0.3. The mole fraction value affects various electrical parameters in terms of leakage current, junction capacitance and transconductance of the channel region. The device exhibits reduced switching capacitance due to the smaller-bandgap pocket region between the source and channel. Analysis of the JLSGTFET is carried out for DC and AC parameters at room temperature. Temperature analysis plays a vital role in determining reliable ON- and OFF-state performance in transistors. Therefore, the proposed pocket JLSGTFET is investigated under harsh temperature conditions to characterize the performance for DC and subthreshold parameters. The sensitivity of the device is analyzed under different temperature conditions over a range of 250–400 K to observe subthreshold performance including transfer characteristics, output characteristics, I_ON/I_OFF ratio, subthreshold slope (SS) and drain-induced barrier lowering (DIBL). The JLSGTFET demonstrates a small variation in DC and subthreshold parameters, indicating good prospects for future analog and digital applications. All the analysis of the proposed JLSGTFET is carried out on a 2D/3D VisualTCAD device simulator.

设计了一种新型的低功耗Si ₁ - _x Ge _x袋式无结单栅隧道场效应晶体管（JLSGTFET），以实现陡峭的亚阈值性能，并在20-sub-Sub以下获得更好的I _ON / I _OFF比（〜10 ⁸）。纳米技术节点。对于SiGe袋区域，由x表示的Ge的摩尔分数保持在0.3。提出的JLSGTFET在Ge摩尔分数x的情况下表现出更好的性能 = 0.3。摩尔分数值在漏电流，结电容和沟道区的跨导方面影响各种电参数。由于源和通道之间的带隙较小的口袋区域，该器件的开关电容减小。在室温下对JLSGTFET的DC和AC参数进行分析。温度分析在确定晶体管的可靠导通和截止状态性能中起着至关重要的作用。因此，在恶劣温度条件下研究了所提出的袖珍JLSGTFET，以表征直流和亚阈值参数的性能。在250-400 K范围内的不同温度条件下分析设备的灵敏度，以观察亚阈值性能，包括传输特性，输出特性，I _ON / I _OFF比，亚阈值斜率（SS）和漏极引起的势垒降低（DIBL）。JLSGTFET演示了DC和亚阈值参数的微小变化，为未来的模拟和数字应用提供了良好的前景。建议的JLSGTFET的所有分析都在2D / 3D VisualTCAD设备模拟器上进行。