Abstract A combined experimental and simulation analysis of the degradation mechanisms induced by hot carriers in a silicon-based split-gate n-channel LDMOS transistor featuring an STI structure is reported. In this regime, electrons can gain sufficient kinetic energy necessary to create charged traps at the silicon/oxide interface, thus inducing device degradation and causing the shift of the electrical parameters of the device. In particular, the on-resistance degradation in linear regime has been experimentally characterized at different stress conditions and at room temperature. The hot-carrier degradation has been reproduced in the frame of TCAD simulations by using physical-based models aimed at reproducing the degradation kinetics. An investigation of the electron distribution function at different stress conditions and its dependence on the split-gate bias is carried out achieving a quantitative understanding of the role played by hot electrons in the hot-carrier degradation mechanisms of the device under test.

中文翻译：

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分裂栅 n 沟道 STI-LDMOS 晶体管中热载流子应力退化的 TCAD 模拟

摘要 报道了对具有 STI 结构的硅基分裂栅 n 沟道 LDMOS 晶体管中热载流子引起的退化机制的联合实验和仿真分析。在这种情况下，电子可以获得足够的动能，以在硅/氧化物界面处产生带电陷阱，从而导致器件退化并导致器件电参数发生变化。特别是，线性状态下的导通电阻退化已经在不同的应力条件和室温下进行了实验表征。通过使用旨在重现降解动力学的基于物理的模型，已在 TCAD 模拟的框架中重现了热载流子降解。