This research proposes a high-performance Carry Select Approximate Full Adder (CSAFA) with one error out of the eight possible output cases for high accuracy 8-bit pixel depth image processing applications. The logic optimization of the proposed CSAFA module is based on a structural hierarchy of AND-OR logic and multiplexer based pre-computation selection logic which reduces the critical path switching activity. The proposed method has the advantage of higher speed, lower power consumption and improved area efficiency. Simulation results show that the proposed CSAFA reduces the critical path delay, power consumption, area, Power-Delay Product (PDP) and Area-Delay Product (ADP) by 26.81%, 44.99%, 23.53%, 59.74%, 44.03% respectively, compared to the existing Conventional Full Adder (CFA). Further, the proposed structure incorporates the 8-bit Error Tolerant Adder (ETA-CSAFA and ETA-CSAFA1) designs. When comparing with 99.5992% Computational Accuracy (CA), the proposed ETA-CSAFA1 design exhibits 0.26% less CA and it offers a savings of 27.82% PDP and 34.39% ADP with respect to the existing ETA-2LOA architecture. The results can be substantiated with an example, a 4-bit accurate part based ETA-CSAFA1 implemented with the proposed approach almost achieves the same CA, while simultaneously reducing the power consumption by 18.14% with respect to the existing best 6-bit accurate part based ETA-2LOA architecture for 8-bit image processing applications.

这项研究提出了一种高性能的进位选择近似全加器（CSAFA），在八种可能的输出情况下，只有一种错误可供高精度8位像素深度图像处理应用。提出的CSAFA模块的逻辑优化基于AND-OR逻辑和基于多路复用器的预计算选择逻辑的结构层次结构，从而减少了关键路径切换活动。所提出的方法具有更高的速度，更低的功耗和更高的面积效率的优点。仿真结果表明，所提出的CSAFA分别将关键路径延迟，功耗，面积，功率延迟乘积（PDP）和面积延迟乘积（ADP）降低了26.81％，44.99％，23.53％，59.74％，44.03％，与现有的常规全加器（CFA）相比。进一步，提议的结构结合了8位容错加法器（ETA-CSAFA和ETA-CSAFA1）设计。与99.5992％的计算精度（CA）相比，拟议的ETA-CSAFA1设计的CA减少了0.26％，相对于现有ETA-2LOA架构，它可以节省27.82％的PDP和34.39％的ADP。可以用一个示例来证实结果，用所提出的方法实现的基于4位精度部件的ETA-CSAFA1几乎可以实现相同的CA，同时相对于现有的最佳6位精度部件可以将功耗降低18.14％基于ETA-2LOA架构的8位图像处理应用程序。相对于现有ETA-2LOA架构，PDP占82％，ADP占34.39％。可以用一个示例来证实结果，用所提出的方法实现的基于4位精度部件的ETA-CSAFA1几乎可以实现相同的CA，同时相对于现有的最佳6位精度部件可以将功耗降低18.14％基于ETA-2LOA架构的8位图像处理应用程序。相对于现有ETA-2LOA架构，PDP占82％，ADP占34.39％。结果可以用一个例子来证实，用所提出的方法实现的基于4位精度部件的ETA-CSAFA1几乎实现了相同的CA，同时相对于现有的最佳6位精度部件将功耗降低了18.14％。基于ETA-2LOA架构的8位图像处理应用程序。