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Investigation of DC, RF and linearity performances of a back-gated (BG) heterojunction (HJ) TFET-on-selbox-substrate (STFET): Introduction to a BG-HJ-STEFT based CMOS inverter
Microelectronics Journal ( IF 1.9 ) Pub Date : 2020-04-11 , DOI: 10.1016/j.mejo.2020.104775
Ashish Kumar Singh , Manas Ranjan Tripathy , Kamalaksha Baral , Prince Kumar Singh , Satyabrata Jit

This manuscript reports the back-gate effects on device-level performance of a heterojunction TFET on SELBOX substrate (HJ-STFET). The proposed structure implements a stacked gate oxide where the conventional SiO2 is replaced by a SiO2/HfO2 in a stacked manner to increase its On-current. A back gate (BG) is also considered in the proposed TFET to enhance the device-level performance. Investigation of DC, RF and linearity parameters such as drain current, transconductance, electric field, parasitic capacitance, cut-off frequency (fT), gain bandwidth product (GBP), intrinsic delay (ꞇ), higher-order of gm (gm2, gm3), VIP2, VIP3, IIP3, IMD3, and 1-dB compression point are carried out for the proposed TFET and the results are compared with other conventional structures. Performance evaluation shows that BG-HJ-STFET is a suitable candidate for distortionless and high-frequency applications. In addition, analysis of DC and transient behaviour of a CMOS TFET inverter using the BG-HJ-STFET is thoroughly investigated to verify its circuit-level performance.



中文翻译:

背栅(BG)异质结(HJ)TSEL衬底上衬底(STFET)的DC,RF和线性性能的研究:基于BG-HJ-STEFT的CMOS逆变器简介

该手稿报告了背栅效应对SELBOX衬底上的异质结TFET(HJ-STFET)的器件级性能的影响。提出的结构实现了堆叠的栅氧化物,其中以堆叠的方式用SiO 2 / HfO 2代替了传统的SiO 2,以增加其导通电流。在建议的TFET中还考虑了背栅(BG),以增强器件级的性能。研究直流,射频和线性参数,例如漏极电流,跨导,电场,寄生电容,截止频率(f T),增益带宽乘积(GBP),固有延迟(ꞇ),g m的高阶(克平方米,克立方米),对拟议的TFET进行了VIP2,VIP3,IIP3,IMD3和1-dB压缩点的计算,并将结果与​​其他常规结构进行了比较。性能评估表明,BG-HJ-STFET是无失真和高频应用的合适候选者。此外,还对使用BG-HJ-STFET的CMOS TFET逆变器的直流和瞬态行为进行了彻底分析,以验证其电路级性能。

更新日期:2020-04-11
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