A foreground calibration technique for switched-current R-2R digital-to-analog converter is proposed. To implement the method, some intermediate nodes are added to the circuit and calibration is done using these nodes to circumvent both current source and resistor mismatches at the output node. A 12-bit, 500-MHz DAC is designed in 0.18 $$\upmu $$ μ m standard CMOS technology with the proposed technique. Simulation results verify that the degraded DAC performance due to the mismatch effects enhances up to 11.5 bits after calibration, imposing a very low power penalty.

中文翻译：

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高分辨率开关电流R-2R数模转换器的一种前景自校准技术

提出了一种用于开关电流R-2R数模转换器的前景校准技术。为实施该方法，将一些中间节点添加到电路中，并使用这些节点完成校准，以规避输出节点处的电流源和电阻器失配。12 位、500 MHz DAC 采用 0.18 $$\upmu $$ μ m 标准 CMOS 技术和所提出的技术进行设计。仿真结果证实，由于失配效应而导致的 DAC 性能在校准后提高了 11.5 位，从而带来了非常低的功耗损失。