Standard complementary-metal-oxide semi-conductor (CMOS) process for the advantages in batch production, low cost, and mostly importantly, scalability has been applied to thermoelectric generator (TEG) designs, where silicon materials are preferable for monolithic circuit integration. In this work, the BiCMOS process is found to be a perfect platform for TEG designs to achieve higher performance by the polysilicon-germanium thin film layer. Simulations of the TEG designs by 0.35 μm SiGe 3P3M and 0.18 μm SiGe 3P6M BiCMOS processes (TSMC) show that the power factors are respectively 0.242 and 0.125 μW/cm² K², and the voltage factors are 10.04 and 25.91 V/cm² K. Both are shown to be superior to all micro TEGs by semiconductor process in the open literature. Experimental verifications confirm the simulation results and validate the effectiveness of TEG designs by the polysilicon-germanium thin film layer in BiCMOS process.

标准的互补金属氧化物半导体（CMOS）工艺具有批量生产，低成本和最重要的优势，可扩展性已应用于热电发生器（TEG）设计，其中硅材料更适合单片电路集成。在这项工作中，发现BiCMOS工艺是TEG设计获得多晶硅锗薄膜层实现更高性能的理想平台。用0.35μmSiGe 3P3M和0.18μmSiGe 3P6M BiCMOS工艺（TSMC）进行的TEG设计仿真显示，功率因数分别为0.242和0.125μW/ cm ²  K ²，电压因数分别为10.04和25.91 V / cm ² K.在公开文献中，半导体工艺均显示它们均优于所有微型TEG。实验验证证实了仿真结果，并验证了BiCMOS工艺中多晶硅锗薄膜层对TEG设计的有效性。