Abstract

Quantum-dot cellular automata (QCA) is an emerging trend in nanotechnology and appropriate for the development of high performance and low power integrated circuit design. Dadda and Wallace tree multipliers are designed by employing CZBCO technique to overcome the crossover issues of geometric design complexity and alignment accuracy and also to achieve high device density. The proposed design of QCA-based Hybrid parallel multiplier consists of decomposing structure that adopts Dadda and Wallace algorithms to optimize the design. In this proposal, N-bit multiplier array is decomposed into four N/2-bit multiplier arrays that are easily constructed by employing both Wallace and Dadda multipliers. The Hybrid multiplier comprising dadda and Wallace tree multiplier uses less number of majority gates and inverters and hence minimizes area, cell count and delay. It has been observed that the QCA cost function of the proposed multiplier better than existing multiplier referred in the literature in terms of energy and speed. Furthermore, the proposed multiplier significantly achieves high device density, lessened clock delay, area and cell count and also to eliminate fabrication difficulty of crossover.

中文翻译：

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使用基于时钟区域的分频器，基于QCA的混合乘法器的高效设计

摘要

量子点细胞自动机（QCA）是纳米技术中的新兴趋势，适用于高性能和低功耗集成电路设计的发展。通过采用CZBCO技术设计Dadda和Wallace树乘法器，以克服几何设计复杂性和对齐精度的交叉问题，并实现高器件密度。所提出的基于QCA的混合并行乘法器的设计包括采用Dadda和Wallace算法对设计进行优化的分解结构。在该建议中，将N位乘法器阵列分解为四个N / 2位乘法器阵列，可以通过同时使用Wallace和Dadda乘法器轻松构造它们。由dadda和Wallace树乘法器组成的Hybrid乘法器使用较少数量的多数门和反相器，从而使面积最小化，信元数和延迟。已经观察到，就能量和速度而言，所提出的乘法器的QCA成本函数优于文献中提到的现有乘法器。此外，所提出的乘法器大大提高了器件密度，降低了时钟延迟，减小了面积和单元数量，并且消除了制造上的交叉难度。