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Voltage-Polarity Dependent Programming Behaviors of Amorphous In-Ga-Zn-O Thin-Film Transistor Memory with an Atomic-Layer-Deposited ZnO Charge Trapping Layer.
Nanoscale Research Letters ( IF 5.5 ) Pub Date : 2019-12-02 , DOI: 10.1186/s11671-019-3204-7
Dan-Dan Liu 1 , Wen-Jun Liu 1 , Jun-Xiang Pei 1 , Lin-Yan Xie 1 , Jingyong Huo 1 , Xiaohan Wu 1 , Shi-Jin Ding 1
Affiliation  

Amorphous In-Ga-Zn-O (a-IGZO) thin-film transistor (TFT) memories are attracting many interests for future system-on-panel applications; however, they usually exhibit a poor erasing efficiency. In this article, we investigate voltage-polarity-dependent programming behaviors of an a-IGZO TFT memory with an atomic-layer-deposited ZnO charge trapping layer (CTL). The pristine devices demonstrate electrically programmable characteristics not only under positive gate biases but also under negative gate biases. In particular, the latter can generate a much higher programming efficiency than the former. Upon applying a gate bias pulse of +13 V/1 μs, the device shows a threshold voltage shift (ΔVth) of 2 V; and the ΔVth is as large as -6.5 V for a gate bias pulse of -13 V/1 μs. In the case of 12 V/1 ms programming (P) and -12 V/10 μs erasing (E), a memory window as large as 7.2 V can be achieved at 103 of P/E cycles. By comparing the ZnO CTLs annealed in O2 or N2 with the as-deposited one, it is concluded that the oxygen vacancy (VO)-related defects dominate the bipolar programming characteristics of the TFT memory devices. For programming at positive gate voltage, electrons are injected from the IGZO channel into the ZnO layer and preferentially trapped at deep levels of singly ionized oxygen vacancy (VO +) and doubly ionized oxygen vacancy (VO 2+). Regarding programming at negative gate voltage, electrons are de-trapped easily from neutral oxygen vacancies because of shallow donors and tunnel back to the channel. This thus leads to highly efficient erasing by the formation of additional ionized oxygen vacancies with positive charges.

中文翻译:

带有原子层沉积ZnO电荷陷阱层的非晶In-Ga-Zn-O薄膜晶体管存储器的电压极性编程行为。

非晶In-Ga-Zn-O(a-IGZO)薄膜晶体管(TFT)存储器在未来的面板上系统应用中吸引了许多兴趣。然而,它们通常表现出较差的擦除效率。在本文中,我们研究了具有原子层沉积的ZnO电荷俘获层(CTL)的a-IGZO TFT存储器的电压极性相关编程行为。原始器件不仅在正栅极偏置下而且在负栅极偏置下都表现出电可编程特性。特别地,后者可以比前者产生更高的编程效率。施加+13 V / 1μs的栅极偏置脉冲时,该器件的阈值电压漂移(ΔVth)为2 V;对于-13 V / 1μs的栅极偏置脉冲,ΔVth高达-6.5V。在12 V / 1 ms编程(P)和-12 V / 10μs擦除(E)的情况下,在103个P / E周期内可实现高达7.2 V的存储器窗口。通过将在O2或N2中退火的ZnO CTL与沉积后的ZnO CTL进行比较,可以得出结论,与氧空位(VO)相关的缺陷主导着TFT存储器件的双极编程特性。为了在正栅极电压下编程,电子从IGZO通道注入到ZnO层中,并优先陷在深层的单电离氧空位(VO +)和双电离氧空位(VO 2+)处。关于在负栅极电压下的编程,由于施主浅且隧穿返回沟道,电子容易从中性氧空位中被俘获。因此,这通过形成带有正电荷的附加电离氧空位而导致高效擦除。在103个P / E周期内可以达到2V。通过将在O2或N2中退火的ZnO CTL与沉积后的ZnO CTL进行比较,可以得出结论,与氧空位(VO)相关的缺陷主导着TFT存储器件的双极编程特性。为了在正的栅极电压下编程,电子从IGZO通道注入到ZnO层中,并优先陷于深层的单电离氧空位(VO +)和双电离氧空位(VO 2+)。关于在负栅极电压下的编程,由于施主浅且隧穿返回沟道,电子容易从中性氧空位中被俘获。因此,这通过形成带有正电荷的附加电离氧空位而导致高效擦除。在103个P / E周期内可以达到2V。通过将在O2或N2中退火的ZnO CTL与沉积后的ZnO CTL进行比较,可以得出结论,与氧空位(VO)相关的缺陷主导着TFT存储器件的双极编程特性。为了在正的栅极电压下编程,电子从IGZO通道注入到ZnO层中,并优先陷于深层的单电离氧空位(VO +)和双电离氧空位(VO 2+)。关于在负栅极电压下的编程,由于施主浅且隧穿返回沟道,电子容易从中性氧空位中被俘获。因此,这通过形成带有正电荷的附加电离氧空位而导致高效擦除。可以得出结论,与氧空位(VO)相关的缺陷主导着TFT存储器件的双极编程特性。为了在正栅极电压下编程,电子从IGZO通道注入到ZnO层中,并优先陷在深层的单电离氧空位(VO +)和双电离氧空位(VO 2+)处。关于在负栅极电压下的编程,由于施主浅且隧穿返回沟道,电子容易从中性氧空位中被俘获。因此,这通过形成带有正电荷的附加电离氧空位而导致高效擦除。可以得出结论,与氧空位(VO)相关的缺陷主导着TFT存储器件的双极编程特性。为了在正的栅极电压下编程,电子从IGZO通道注入到ZnO层中,并优先陷于深层的单电离氧空位(VO +)和双电离氧空位(VO 2+)。关于在负栅极电压下的编程,由于施主浅且隧穿返回沟道,电子容易从中性氧空位中被俘获。因此,这通过形成带有正电荷的附加电离氧空位而导致高效擦除。电子从IGZO通道注入到ZnO层中,并优先捕获在单电离氧空位(VO +)和双电离氧空位(VO 2+)的较深水平。关于在负栅极电压下的编程,由于施主浅且隧穿返回沟道,电子容易从中性氧空位中被俘获。因此,这通过形成带有正电荷的附加电离氧空位而导致高效擦除。电子从IGZO通道注入到ZnO层中,并优先捕获在单电离氧空位(VO +)和双电离氧空位(VO 2+)的较深水平。关于在负栅极电压下的编程,由于施主浅且隧穿返回沟道,电子容易从中性氧空位中被俘获。因此,这通过形成带有正电荷的附加电离氧空位而导致高效擦除。
更新日期:2019-12-02
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