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Capacitor-less dynamic random access memory based on a III–V transistor with a gate length of 14 nm
Nature Electronics ( IF 34.3 ) Pub Date : 2019-08-19 , DOI: 10.1038/s41928-019-0282-6
Carlos Navarro , Siegfried Karg , Carlos Marquez , Santiago Navarro , Clarissa Convertino , Cezar Zota , Lukas Czornomaz , Francisco Gamiz

Dynamic random access memory (DRAM) cells are commonly used in electronic devices and are formed from a single transistor and capacitor. Alternative approaches, which are based on the floating body effect, have been proposed that could reduce manufacturing complexity and minimize the cell footprint by removing the external capacitor. Such capacitor-less DRAM has been demonstrated in silicon, but the use of other materials, including III–V compound semiconductors, remains relatively unexplored, despite the fact that they could lead to enhanced performance. Here we report capacitor-less one-transistor DRAM cells based on indium gallium arsenide (InGaAs). With our InGaAs on insulator transistors, we demonstrate different current levels for each logic state, and thus successful memory behaviour, down to a gate length of 14 nm.



中文翻译:

基于III–V晶体管且栅极长度为14 nm的无电容动态随机存取存储器

动态随机存取存储器(DRAM)单元通常用于电子设备中,并且由单个晶体管和电容器形成。已经提出了基于浮体效应的替代方法,该替代方法可以通过去除外部电容器来降低制造复杂性并最小化电池占用面积。这种无电容器的DRAM已经在硅中得到了证明,但是,包括III–V化合物半导体在内的其他材料的使用仍然相对未开发,尽管它们可能导致性能提高。在这里,我们报告基于砷化铟镓(InGaAs)的无电容器单晶体管DRAM单元。利用我们在绝缘体晶体管上的InGaAs,我们展示了每个逻辑状态不同的电流水平,从而成功地实现了存储行为,直至栅极长度仅为14 nm。

更新日期:2019-08-20
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