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Mechanism for generating interstitial atoms by thermal stress during silicon crystal growth
Progress in Crystal Growth and Characterization of Materials ( IF 4.5 ) Pub Date : 2019-02-01 , DOI: 10.1016/j.pcrysgrow.2019.01.001
Takao Abe , Toru Takahashi , Koun Shirai

Abstract It has been known that, in growing silicon from melts, vacancies (Vs) predominantly exist in crystals obtained by high-rate growth, while interstitial atoms (Is) predominantly exist in crystals obtained by low-rate growth. To reveal the cause, the temperature distributions in growing crystal surfaces were measured. From this result, it was presumed that the high-rate growth causes a small temperature gradient between the growth interface and the interior of the crystal; in contrast, the low-rate growth causes a large temperature gradient between the growth interface and the interior of the crystal. However, this presumption is opposite to the commonly-accepted notion in melt growth. In order to experimentally demonstrate that the low-rate growth increases the temperature gradient and consequently generates Is, crystals were filled with vacancies by the high-rate growth, and then the pulling was stopped as the extreme condition of the low-rate growth. Nevertheless, the crystals continued to grow spontaneously after the pulling was stopped. Hence, simultaneously with the pulling-stop, the temperature of the melts was increased to melt the spontaneously grown portions, so that the diameters were restored to sizes at the moment of pulling-stop. Then, the crystals were cooled as the cooling time elapsed, and the temperature gradient in the crystals was increased. By using X-ray topographs before and after oxygen precipitation in combination with a minority carrier lifetime distribution, a time-dependent change in the defect type distribution was successfully observed in a three-dimensional manner from the growth interface to the low-temperature portion where the cooling progressed. This result revealed that Vs are uniformly introduced in a grown crystal regardless of the pulling rate as long as the growth continues, and the Vs agglomerate as a void and remain in the crystal, unless recombined with Is. On the other hand, Is are generated only in a region where the temperature gradient is large by low-rate growth. In particular, the generation starts near the peripheral portion in the vicinity of the solid–liquid interface. First, the generated Is are recombined with Vs introduced into the growth interface, so that a recombination region is always formed which is regarded as substantially defect free. Excessively generated Is after the recombination agglomerate and form a dislocation loop region. Unlike conventional Voronkov's diffusion model, Is hardly diffuse over a long distance. Is are generated by re-heating after growth. [In a steady state, the crystal growth rate is synonymous with the pulling rate. Meanwhile, when an atypical operation is performed, the pulling rate is specifically used.] This review on point defects formation intends to contribute further silicon crystals development, because electronic devices are aimed to have finer structures, and there is a demand for more perfect crystals with controlled point defects.

中文翻译:

硅晶体生长过程中通过热应力产生间隙原子的机制

摘要 众所周知,在从熔体中生长硅时,空位(Vs)主要存在于高速生长的晶体中,而间隙原子(Is)主要存在于低速生长的晶体中。为了揭示原因,测量了生长晶体表面的温度分布。从这个结果可以推测,高速生长导致生长界面和晶体内部之间的温度梯度很小。相反,低速生长会导致生长界面和晶体内部之间的温度梯度很大。然而,这种假设与熔体生长中普遍接受的概念相反。为了通过实验证明低速率生长会增加温度梯度并因此产生 Is,晶体通过高速生长填充空位,然后作为低速生长的极端条件停止提拉。然而,在停止提拉后晶体继续自发生长。因此,在停止拉伸的同时,增加熔体的温度以熔化自发生长的部分,从而直径恢复到停止拉伸时的尺寸。然后,随着冷却时间的流逝晶体被冷却,并且晶体中的温度梯度增加。通过使用氧沉淀前后的 X 射线形貌以及少数载流子寿命分布,从生长界面到冷却进行的低温部分,以三维方式成功观察到缺陷类型分布的随时间变化。该结果表明,只要生长继续,无论提拉速率如何,Vs 都会均匀地引入到生长的晶体中,并且 Vs 作为空隙聚集并保留在晶体中,除非与 Is 重新结合。另一方面,Is仅在因低速生长而温度梯度大的区域中产生。特别是在固液界面附近的外围部分附近开始生成。首先,生成的Is与引入生长界面的Vs复合,因此总是形成复合区,该复合区被认为基本上没有缺陷。过量生成的Is在复合后团聚形成位错环区。与传统的 Voronkov 扩散模型不同,它几乎无法长距离扩散。是生长后重新加热产生的。[在稳定状态下,晶体生长速度与提拉速度同义。同时,当进行非典型操作时,特别使用提拉速率。] 这篇关于点缺陷形成的评论旨在进一步促进硅晶体的发展,因为电子设备旨在具有更精细的结构,并且需要更完美的晶体具有受控点缺陷。[在稳定状态下,晶体生长速度与提拉速度同义。同时,当进行非典型操作时,特别使用提拉速率。] 这篇关于点缺陷形成的评论旨在进一步促进硅晶体的发展,因为电子设备旨在具有更精细的结构,并且需要更完美的晶体具有受控点缺陷。[在稳定状态下,晶体生长速度与提拉速度同义。同时,当进行非典型操作时,特别使用提拉速率。] 这篇关于点缺陷形成的评论旨在进一步促进硅晶体的发展,因为电子设备旨在具有更精细的结构,并且需要更完美的晶体具有受控点缺陷。
更新日期:2019-02-01
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