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Probing single electrons across 300-mm spin qubit wafers
Nature ( IF 64.8 ) Pub Date : 2024-05-01 , DOI: 10.1038/s41586-024-07275-6
Samuel Neyens , Otto K. Zietz , Thomas F. Watson , Florian Luthi , Aditi Nethwewala , Hubert C. George , Eric Henry , Mohammad Islam , Andrew J. Wagner , Felix Borjans , Elliot J. Connors , J. Corrigan , Matthew J. Curry , Daniel Keith , Roza Kotlyar , Lester F. Lampert , Mateusz T. Mądzik , Kent Millard , Fahd A. Mohiyaddin , Stefano Pellerano , Ravi Pillarisetty , Mick Ramsey , Rostyslav Savytskyy , Simon Schaal , Guoji Zheng , Joshua Ziegler , Nathaniel C. Bishop , Stephanie Bojarski , Jeanette Roberts , James S. Clarke

Building a fault-tolerant quantum computer will require vast numbers of physical qubits. For qubit technologies based on solid-state electronic devices1,2,3, integrating millions of qubits in a single processor will require device fabrication to reach a scale comparable to that of the modern complementary metal–oxide–semiconductor (CMOS) industry. Equally important, the scale of cryogenic device testing must keep pace to enable efficient device screening and to improve statistical metrics such as qubit yield and voltage variation. Spin qubits1,4,5 based on electrons in Si have shown impressive control fidelities6,7,8,9 but have historically been challenged by yield and process variation10,11,12. Here we present a testing process using a cryogenic 300-mm wafer prober13 to collect high-volume data on the performance of hundreds of industry-manufactured spin qubit devices at 1.6 K. This testing method provides fast feedback to enable optimization of the CMOS-compatible fabrication process, leading to high yield and low process variation. Using this system, we automate measurements of the operating point of spin qubits and investigate the transitions of single electrons across full wafers. We analyse the random variation in single-electron operating voltages and find that the optimized fabrication process leads to low levels of disorder at the 300-mm scale. Together, these results demonstrate the advances that can be achieved through the application of CMOS-industry techniques to the fabrication and measurement of spin qubit devices.



中文翻译:

探测 300 毫米自旋量子位晶圆上的单电子

构建容错量子计算机将需要大量的物理量子位。对于基于固态电子器件1,2,3 的量子位技术,在单个处理器中集成数百万个量子位将需要器件制造达到与现代互补金属氧化物半导体 (CMOS) 行业相当的规模。同样重要的是,低温设备测试的规模必须跟上,以实现高效的设备筛选并改善量子位产量和电压变化等统计指标。基于硅中电子的自旋量子位1,4,5已表现出令人印象深刻的控制保真度6,7,8,9但历史上一直受到产量和工艺变化的挑战10,11,12。在这里,我们介绍了一种使用低温 300 毫米晶圆探测器13的测试过程,以收集有关数百个工业制造的自旋量子位器件在 1.6 K 下的性能的大量数据。该测试方法提供快速反馈,以实现 CMOS- 的优化。兼容的制造工艺,导致高产量和低工艺变化。使用该系统,我们可以自动测量自旋量子位的工作点,并研究单个电子在整个晶圆上的跃迁。我们分析了单电子工作电压的随机变化,发现优化的制造工艺可在 300 毫米尺度上实现低水平的无序性。这些结果共同证明了通过将 CMOS 工业技术应用于自旋量子位器件的制造和测量可以实现的进步。

更新日期:2024-05-02
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