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Defect Engineering at the Al2O3/(010)尾-Ga2O3Interface via Surface Treatments and Forming Gas Post-Deposition Anneals
IEEE Transactions on Electron Devices ( IF 2.9 ) Pub Date : 8-30-2022 , DOI: 10.1109/ted.2022.3200643
Ahmad Ehteshamul Islam 1 , Chenyu Zhang 2 , Kursti DeLello 2 , David A. Muller 2 , Kevin D. Leedy 1 , Sabyasachi Ganguli 3 , Neil A. Moser 1 , Rachel Kahler 4 , Jeremiah C. Williams 1 , Daniel M. Dryden 4 , Stephen Tetlak 1 , Kyle J. Liddy 1 , Andrew J. Green 1 , Kelson D. Chabak 1
Affiliation  

High-quality dielectrics with a low defect density at the dielectric/semiconductor interface are essential for the application of β\beta -Ga2O3 in the next-generation power electronic devices. In this article, we demonstrate a method for reducing defect density at the Al2O3/(010) β\beta -Ga2O3 interface, where metal–oxide–semiconductor capacitors (MOSCAPs) were fabricated by depositing Al2O3 on the surface of (010) β\beta -Ga2O3 treated sequentially with piranha and buffered hydrofluoric (HF) acid. The devices also went through a post- dielectric deposition anneal (PDA) in a forming gas ambient (FG-PDA). The fabricated devices were then characterized using current–voltage and capacitance–voltage ( C{C} – V{V} ) measurements. The quality of Al2O3 films and surfaces was also characterized using cross-sectional transmission electron microscopy (TEM), ellipsometry, and atomic force microscopy (AFM). Electrical measurements suggested low hysteresis, consistent flat-band voltage, and excellent accumulation for MOSCAPs with an interface defect density DIT<10{D} _{{\mathrm {IT}}} < 10 12 cm−2 ⋅\cdot eV−1 characterized using conductance and photo-assisted C{C} – V{V} (PCV) methods. In some devices, PCV method created additional DIT{D} _{{\mathrm {IT}}} during characterization. Measured leakage current through Al2O3 until its breakdown was explained using a modified space-charge-limited conduction model. Control samples prepared without (or with limited) surface treatments and without forming gas PDA revealed the importance of different process components for reducing DIT{D} _{{\mathrm {IT}}} . TEM images revealed interfacial crystallization as the origin of higher defect densities in the control samples.

中文翻译:


通过表面处理和形成气体沉积后退火进行 Al2O3/(010)β-Ga2O3 界面的缺陷工程



电介质/半导体界面处具有低缺陷密度的高质量电介质对于β\beta-Ga2O3在下一代电力电子器件中的应用至关重要。在本文中,我们演示了一种降低 Al2O3/(010) β\beta -Ga2O3 界面缺陷密度的方法,其中通过在 (010) β\ 表面沉积 Al2O3 来制造金属氧化物半导体电容器 (MOSCAP) β-Ga2O3 依次用食人鱼和缓冲氢氟 (HF) 酸处理。该器件还在合成气体环境(FG-PDA)中经历了电介质沉积后退火(PDA)。然后使用电流-电压和电容-电压 (C{C} – V{V}) 测量来表征所制造的器件。 Al2O3 薄膜和表面的质量也使用截面透射电子显微镜 (TEM)、椭圆光度术和原子力显微镜 (AFM) 进行表征。电气测量表明,界面缺陷密度 DIT<10{D} _{{\mathrm {IT}}} < 10 12 cm−2 ⋅\cdot eV−1 的 MOSCAP 具有低磁滞、一致的平带电压和出色的累积性能使用电导和光辅助 C{C} – V{V} (PCV) 方法进行表征。在某些器件中,PCV 方法在表征过程中创建了额外的 DIT{D} _{{\mathrm {IT}}}。测量通过 Al2O3 的漏电流直至其击穿,并使用改进的空间电荷限制传导模型对其进行解释。未经(或有限)表面处理且无形成气体 PDA 制备的对照样品揭示了不同工艺组件对于减少 DIT{D} _{{\mathrm {IT}}} 的重要性。 TEM 图像显示界面结晶是对照样品中较高缺陷密度的根源。
更新日期:2024-08-28
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