In this brief, we present CIMulator, an open-source, extensible modeling, simulation, and emulation framework for on-chip digital Computing-In-Memory (CIM) design and assessment. Featuring a synthesizable Register Transfer Level (RTL) model, CIMulator encapsulates the fundamental in-memory bitline logic and the near-memory compute functionalities altogether. In this way, CIMulator ensures cycle-accurate RTL simulation, as well as system-level processor/CIM integration and emulation on COTS (commercially off-the-shelf) FPGA devices with an end-to-end correctness guarantee. In addition, we adopt a CIM intrinsics programming approach and an instruction-level energy model to estimate the application program execution energy. We implement an illustrative CIM system design emulated on a Cyclone-IV FPGA device and assess the functionality and performances of several applications, demonstrating the effectiveness of the proposed methodology. The source code is available at https://github.com/adervay1/CIMulator.

中文翻译：

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CIMulator：内存计算仿真器框架


在本简介中，我们介绍 CIMulator，这是一种用于片上数字内存计算 (CIM) 设计和评估的开源、可扩展建模、仿真和仿真框架。 CIMulator 采用可综合的寄存器传输级 (RTL) 模型，将基本的内存位线逻辑和近内存计算功能封装在一起。通过这种方式，CIMulator 可确保周期精确的 RTL 仿真，以及 COTS（商业现货）FPGA 设备上的系统级处理器/CIM 集成和仿真，并提供端到端正确性保证。此外，我们采用CIM内在编程方法和指令级能量模型来估计应用程序执行能量。我们在 Cyclone-IV FPGA 器件上实现了一个仿真的说明性 CIM 系统设计，并评估了多个应用程序的功能和性能，证明了所提出方法的有效性。源代码可在 https://github.com/adervay1/CIMulator 获取。