ABSTRACT

In this paper, we present the high-speed phase frequency detector where the phase characteristics are enhanced. This PFD has a simple structure where the dead zone is annihilated and blind zone is highly reduced. This PFD generates UP and DN signal only when it gets the distinct phase difference. With the reduction of the reset time, the proposed PFD function is in the order of 1.5 MHz$MHz$$MHz$ − 4 GHzGHz$GHz$ operating frequency. The design shows the improvement by completely eliminating the dead zone. However, the blind zone is minimised to 74.6 $ps$ in the phase characteristics which improves the output phase noise as −132.9 $dBc/Hz$ at 1 $MHz$ offset frequency. The power consumption is minimised upto 417.3 $\mu W$@ 4$GHz$ operating frequency. The design is simulated in standard 0.18 $\text{mum}$ CMOS technology node with 1.8 $V$ power supply. Furthermore, the achieved frequency band is applicable for high-speed and low-power PLL application such as Zigbee, Wifi, Bluetooth and 4 G communication.

摘要

在本文中，我们提出了增强相位特性的高速相位频率检测器。该PFD结构简单，死区被消灭，盲区大大减少。该PFD仅在获得明显的相位差时才产生UP和DN信号。随着复位时间的减少，建议的 PFD 函数约为 1.5中号Hz$\mathrm{中号}Hz$$MHz$− 4GHZ _ _GH _z$GHz$工作频率。该设计通过完全消除死区展示了改进。然而，盲区最小化至 74.6$ps$相位特性将输出相位噪声改善为-132.9$d乙C/Hz$在 1$\mathrm{中号}Hz$偏移频率。功耗最小化至417.3$\mu 瓦$@4$GHz$工作频率。该设计在标准 0.18 中进行模拟$\text{妈妈}$CMOS技术节点1.8$V$电源。此外，所实现的频段适用于Zigbee、Wifi、蓝牙和4G通信等高速、低功耗PLL应用。