This paper presents the first time-interleaved analog-to-digital background calibration targeted for multilevel modulations that can calibrate offset, gain, time skew and bandwidth mismatches (to the author's knowledge). The mismatch errors are estimated based on the interleaving channels histograms. Moreover, the proposed calibration can be adapted to any interleaving factor with a multiplication-less estimation logic based on a greedy algorithm. Numerical simulations show satisfactory performance improvements for a 2-level, a 4-level and an 8-level symbol transmission, along with 4-channel and 32-channel TI-ADC interleaving orders. Furthermore, a new SNDR formula is derived considering all the TI-ADC mismatch distortions that can be compared with the obtained results. The measurement results show the proposed calibration working under a binary PRBS31 pattern with both a 3.6 GS/s and 7.2 GS/s signaling rates for a 3.6 GS/s 2-channel TI-ADC experimental board.

中文翻译：

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基于概率密度函数差和贪心算法的多级调制后台M通道时间交错ADC校准


本文提出了第一个针对多级调制的时间交错模数背景校准，可以校准偏移、增益、时间偏差和带宽不匹配（据作者所知）。失配误差是根据交织通道直方图来估计的。此外，所提出的校准可以通过基于贪婪算法的无乘估计逻辑来适应任何交织因子。数值模拟显示 2 级、4 级和 8 级符号传输以及 4 通道和 32 通道 TI-ADC 交错阶数的性能得到了令人满意的改进。此外，考虑到所有 TI-ADC 失配失真，推导了一个新的 SNDR 公式，可以与所获得的结果进行比较。测量结果显示，所提出的校准工作在二进制 PRBS31 模式下，对于 3.6 GS/s 2 通道 TI-ADC 实验板，具有 3.6 GS/s 和 7.2 GS/s 信号速率。