ABSTRACT

This paper introduces an 8T single-ended SRAM cell to improve stability and decrease energy consumption. It cuts the pull-down path to the storage node written ‘1’, enhancing the write ability. It uses an isolated read path to enhance the read stability with low power and energy consumption. At a supply voltage of 0.5 V, the read static noise margin, write margin, read energy, and write energy of the proposed cell are superior by 320%, 233%, 12%, and 26%, respectively, compared to the conventional 6T. We performed 5,000 Monte Carlo simulations in the 32 nm technology to evaluate read yields. The results show that our cell has 6.9x more yields than the conventional 6T SRAM cell. Therefore, the proposed cell can be a good option for high stability and low power/energy applications.

摘要

本文介绍了一种 8T 单端 SRAM 单元，以提高稳定性并降低能耗。它切断了写入“1”的存储节点的下拉路径，增强了写入能力。它采用隔离的读取路径，以低功耗和能耗增强读取稳定性。在电源电压为 0.5 V 时，与传统 6T 相比，该单元的读取静态噪声容限、写入容限、读取能量和写入能量分别提高了 320%、233%、12% 和 26% 。我们在 32 nm 技术中进行了 5,000 次蒙特卡洛模拟，以评估读取良率。结果表明，我们的单元的产量比传统 6T SRAM 单元高 6.9 倍。因此，所提出的电池对于高稳定性和低功率/能量应用来说是一个不错的选择。