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Chopping for over 50 MHz gain-bandwidth product current sense amplifiers achieving input noise level of 8.5 nV/√Hz
International Journal of Circuit Theory and Applications ( IF 1.8 ) Pub Date : 2022-08-02 , DOI: 10.1002/cta.3402
Christian D. Matthus 1 , Frank Ellinger 1
Affiliation  

An accurate, high-speed, fully differential difference amplifier for current sensing utilizing the chopper approach was implemented in a 0.18 μm complementary metal-oxide-semiconductor (CMOS) technology. Unlike state-of-the-art solutions, we use a higher chopping frequency in the MHz range due to the bandwidth requirements of the introduced circuits for the latter application, namely, low-side phase-current measurement in motor control circuits. Except the low-pass filter (LPF) effect of the output stage, no additional LPF was integrated in hardware at the output of the circuits. We show that on the other hand a digital LPF, which can be integrated in the field-programmable gate-array (FPGA) logic or microcontroller used for the motor control, offers a higher flexibility in terms of filter design. Weak input signals of only few mV can be reconstructed with a high accuracy. This is demonstrated for a 500 kHz rectangular signal and a chopping frequency of 20 MHz. Note that an input-signal frequency of several hundreds of kHz with harmonics in the MHz region is very challenging for chopper amplifiers. Still, a significant decrease of the input-referred noise is demonstrated, especially cancelling out the 1/f-noise achieving a remaining noise floor of approximately 8.5 nV/√Hz. Overall, the input-referred noise level can be pushed far below 50 μV (root mean square). Moreover, using a quite relaxed second-order Butterworth filter with a 3 dB corner frequency of 1 MHz, input-referred noise levels of 10 μV (root mean square) can be easily achieved at the costs of reduced bandwidth. The lowest achieved input offset is 50 μV. The gain is adjusted by resistive feedback and is approximately 40 dB. Hence, the amplifier is suitable for current sensing in motor control circuits, and a significant reduction of the shunt resistance typically used for this purpose will be possible.

中文翻译:

超过 50 MHz 增益带宽积电流检测放大器的斩波可实现 8.5 nV/√Hz 的输入噪声水平

采用 0.18 μm 互补金属氧化物半导体 (CMOS) 技术实现了使用斩波方法进行电流感测的精确、高速、全差动差分放大器。与最先进的解决方案不同,我们使用 MHz 范围内更高的斩波频率,这是由于为后者应用引入的电路的带宽要求,即电机控制电路中的低侧相电流测量。除了输出级的低通滤波器 (LPF) 效应外,电路输出端的硬件中没有集成额外的 LPF。我们表明,另一方面,可以集成在用于电机控制的现场可编程门阵列 (FPGA) 逻辑或微控制器中的数字 LPF 在滤波器设计方面提供了更高的灵活性。可以高精度地重建只有几毫伏的微弱输入信号。这是针对 500 kHz 矩形信号和 20 MHz 斩波频率进行演示的。请注意,数百 kHz 的输入信号频率以及 MHz 范围内的谐波对于斩波放大器来说非常具有挑战性。尽管如此,还是证明了输入参考噪声的显着降低,尤其是抵消了 1/f - 噪声达到约 8.5 nV/√Hz 的剩余本底噪声。总的来说,输入参考噪声电平可以被压到远低于 50 μV(均方根)的水平。此外,使用具有 1 MHz 3 dB 转角频率的相当宽松的二阶巴特沃斯滤波器,可以以降低带宽为代价轻松实现 10 μV(均方根)的输入参考噪声电平。实现的最低输入失调为 50 μV。增益由电阻反馈调节,约为 40 dB。因此,该放大器适用于电机控制电路中的电流检测,并且可以显着降低通常用于此目的的分流电阻。
更新日期:2022-08-02
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