Non-volatile computing-in-memory macros that are based on two-dimensional arrays of memristors are of use in the development of artificial intelligence edge devices. Scaling such systems to three-dimensional arrays could provide higher parallelism, capacity and density for the necessary vector–matrix multiplication operations. However, scaling to three dimensions is challenging due to manufacturing and device variability issues. Here we report a two-kilobit non-volatile computing-in-memory macro that is based on a three-dimensional vertical resistive random-access memory fabricated using a 55 nm complementary metal–oxide–semiconductor process. Our macro can perform 3D vector–matrix multiplication operations with an energy efficiency of 8.32 tera-operations per second per watt when the input, weight and output data are 8, 9 and 22 bits, respectively, and the bit density is 58.2 bit µm^–2. We show that the macro offers more accurate brain MRI edge detection and improved inference accuracy on the CIFAR-10 dataset than conventional methods.

基于忆阻器二维阵列的非易失性内存计算宏可用于人工智能边缘设备的开发。将此类系统扩展到 3 维阵列可以为必要的向量矩阵乘法运算提供更高的并行性、容量和密度。然而，由于制造和设备可变性问题，缩放到三个维度具有挑战性。在这里，我们报告了一个 2 kb 非易失性内存计算宏，它基于使用 55 nm 互补金属氧化物半导体工艺制造的三维垂直电阻随机存取存储器。当输入、权重和输出数据为 8、9 和 22 位时，我们的宏可以执行 3D 矢量矩阵乘法运算，能效为每秒每瓦特 8.32 兆次运算，^–2。我们表明，与传统方法相比，该宏在 CIFAR-10 数据集上提供了更准确的大脑 MRI 边缘检测和更高的推理精度。