We demonstrate a 36 × 36 gate electrode crossbar that supports 648 narrow-channel field effect transistors (FET) for gate-defined quantum dots, with a quadratic increase in quantum dot count upon a linear increase in control lines. The crossbar is fabricated on an industrial ²⁸Si-MOS stack and shows 100% FET yield at cryogenic temperature. We observe a decreasing threshold voltage for wider channel devices and obtain a normal distribution of pinch-off voltages for nominally identical tunnel barriers probed over 1296 gate crossings. Macroscopically across the crossbar, we measure an average pinch-off of 1.17 V with a standard deviation of 46.8 mV, while local differences within each unit cell indicate a standard deviation of 23.1 mV. These disorder potential landscape variations translate to 1.2 and 0.6 times the measured quantum dot charging energy, respectively. Such metrics provide means for material and device optimization and serve as guidelines in the design of large-scale architectures for fault-tolerant semiconductor-based quantum computing.

我们展示了一个 36 × 36 栅电极交叉开关，它支持 648 个用于栅极定义的量子点的窄通道场效应晶体管 (FET)，随着控制线的线性增加，量子点计数呈二次增加。横杆是在工业^{28上制造的}Si-MOS 堆栈，在低温下显示 100% 的 FET 良率。我们观察到更宽通道器件的阈值电压降低，并获得了在 1296 个栅极交叉点上探测的名义上相同的隧道势垒的夹断电压的正态分布。从宏观上看，我们测量了 1.17 V 的平均夹断电压，标准偏差为 46.8 mV，而每个晶胞内的局部差异表明标准偏差为 23.1 mV。这些无序电位景观变化分别转化为测量的量子点充电能量的 1.2 倍和 0.6 倍。这些指标为材料和设备优化提供了手段，并作为基于容错半导体的量子计算的大规模架构设计的指导方针。