Artificial intelligence applications have changed the landscape of computer design, driving a search for hardware architecture that can efficiently process large amounts of data. Three-dimensional heterogeneous integration with advanced packaging technologies could be used to improve data bandwidth among sensors, memory and processors. However, such systems are limited by a lack of hardware reconfigurability and the use of conventional von Neumann architectures. Here we report stackable hetero-integrated chips that use optoelectronic device arrays for chip-to-chip communication and neuromorphic cores based on memristor crossbar arrays for highly parallel data processing. With this approach, we create a system with stackable and replaceable chips that can directly classify information from a light-based image source. We also modify this system by inserting a preprogrammed neuromorphic denoising layer that improves the classification performance in a noisy environment. Our reconfigurable three-dimensional hetero-integrated technology can be used to vertically stack a diverse range of functional layers and could provide energy-efficient sensor computing systems for edge computing applications.

人工智能应用改变了计算机设计的格局，推动了对能够有效处理大量数据的硬件架构的探索。与先进封装技术的三维异构集成可用于提高传感器、内存和处理器之间的数据带宽。然而，此类系统受限于缺乏硬件可重构性和使用传统的冯诺依曼架构。在这里，我们报告了可堆叠的异质集成芯片，这些芯片使用光电器件阵列进行芯片间通信，并使用基于忆阻器交叉开关阵列的神经形态内核进行高度并行的数据处理。通过这种方法，我们创建了一个具有可堆叠和可更换芯片的系统，可以直接对来自基于光的图像源的信息进行分类。我们还通过插入一个预编程的神经形态去噪层来修改这个系统，该层提高了嘈杂环境中的分类性能。我们的可重构三维异质集成技术可用于垂直堆叠各种功能层，并可为边缘计算应用提供节能的传感器计算系统。