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Novel Error-Tolerant Voltage-Divider-Based Through-Silicon-Via Test Architecture
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ( IF 2.9 ) Pub Date : 2022-05-02 , DOI: 10.1109/tcad.2022.3172058
Youngkwang Lee 1 , Donghyun Han 1 , Sooryeong Lee 1 , Sungho Kang 1
Affiliation  

A voltage-divider-based through-silicon-via (TSV) test architecture tests the TSV by using the voltage value differently divided according to TSV defects. This architecture is widely used for TSV testing owing to its small hardware overhead and high test speed. However, the existing voltage-divider-based TSV test architectures are vulnerable to process–voltage–temperature (PVT) variations and noise. In addition, they cannot effectively detect pinhole defects. This study proposes a novel error-tolerant voltage-divider-based TSV test architecture to address these problems. The proposed architecture reduces the test errors by appropriately adjusting the on-resistance value of each MOSFET and adding a compensator circuit. In addition, it effectively detects the pinhole defects by modifying the voltage divider structure and changing the MOSFET control method. Experimental results reveal that the proposed architecture promptly tests various TSV defects and significantly reduces the test errors.

中文翻译:

基于硅通孔测试架构的新型容错分压器

基于分压器的硅通孔(TSV)测试架构通过使用根据TSV缺陷不同划分的电压值来测试TSV。由于其硬件开销小和测试速度快,该架构被广泛用于 TSV 测试。然而,现有的基于分压器的 TSV 测试架构容易受到工艺电压温度 (PVT) 变化和噪声的影响。此外,它们无法有效检测针孔缺陷。本研究提出了一种基于容错分压器的新型 TSV 测试架构来解决这些问题。所提出的架构通过适当调整每个 MOSFET 的导通电阻值并添加补偿电路来减少测试误差。此外,它通过修改分压器结构和改变MOSFET控制方式,有效地检测出针孔缺陷。实验结果表明,所提出的架构可以迅速测试各种 TSV 缺陷,并显着减少测试错误。
更新日期:2022-05-02
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