This article investigates the possibility to develop time-domain immunity tests using electric near-field probes, for flexible customization of broadband input waveforms injected into specific pins of PCBs. For this purpose, a test design methodology is proposed, which is based on circuit modeling of the injection mechanism on the one hand, and on pulse design and equalization on the other hand. Two circuit models are developed. The former employs measurement/simulation data along with port-reduction techniques to model noise injection through near-field probes by means of internal induced sources. Conversely, the latter model only includes passive components and is derived starting from physical observation of the involved phenomena. Both models are compatible with circuit solvers and can be easily adapted for different traces under test. Since pulse-like noise is usually broadband, suitable stress waveforms are utilized to obtain different noise spectra. Also, in order to precisely control the shape of the waveform reaching the targeted pin, an equalization procedure is employed. These models and techniques can be easily applied to amplification systems originally designed for frequency-domain tests, thus providing a comprehensive solution for the design of broadband immunity tests in the time domain. The feasibility and accuracy of the proposed methodology are proved by full-wave simulations and measurements.

中文翻译：

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使用电近场探头进行时域抗扰度研究的测试设计方法


本文研究了使用电近场探头开发时域抗扰度测试的可能性，以灵活定制注入 PCB 特定引脚的宽带输入波形。为此，提出了一种测试设计方法，该方法一方面基于注入机制的电路建模，另一方面基于脉冲设计和均衡。开发了两种电路模型。前者采用测量/模拟数据以及端口减少技术，通过内部感应源对通过近场探头的噪声注入进行建模。相反，后一种模型仅包含无源元件，并且是从对所涉及现象的物理观察出发而推导出来的。两种模型都与电路解算器兼容，并且可以轻松适应不同的测试迹线。由于脉冲状噪声通常是宽带的，因此利用合适的应力波形来获得不同的噪声频谱。此外，为了精确控制到达目标引脚的波形形状，采用了均衡程序。这些模型和技术可以很容易地应用于原本为频域测试设计的放大系统，从而为时域宽带抗扰度测试的设计提供全面的解决方案。全波仿真和测量证明了该方法的可行性和准确性。