A 232–250-GHz traveling-wave frequency doubler is presented using a 250-nm InP double heterodyne bipolar transistor (DHBT) technology. Compared to the previous traveling-wave structures, the proposed frequency doubler employs physical open at the end of the input feed line, thus minimizing the input signal leakage and avoiding the crossover of the output signal line. In addition, the output power is maximized by load–pull matching at the 2nd harmonic while the fundamental suppression is enhanced by phase compensation of the differential signal. The frequency doubler exhibits peak output power of 5.2 dBm at 240 GHz with a conversion gain of −4.3 dB and overall efficiency of 2.9%. The 3-dB bandwidth for output power is from 232 to 250 GHz. The fundamental suppression is 25 to 33 dB over the bandwidth. The chip size is as small as 443×536μm2443 \times536\,\,\mu \text{m}^{2} owing to the traveling-wave structure requiring no balun.

中文翻译：

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紧凑型 232”250-GHz 行波倍频器，峰值输出功率为 5.2 dBm，效率为 2.9%


采用 250 nm InP 双外差双极晶体管 (DHBT) 技术推出了 232–250 GHz 行波倍频器。与以前的行波结构相比，所提出的倍频器在输入馈线末端采用物理开路，从而最大限度地减少输入信号泄漏并避免输出信号线的交叉。此外，通过二次谐波的负载牵引匹配来最大化输出功率，同时通过差分信号的相位补偿来增强基波抑制。该倍频器在 240 GHz 时的峰值输出功率为 5.2 dBm，转换增益为 -4.3 dB，总体效率为 2.9%。输出功率的 3dB 带宽为 232 至 250 GHz。带宽内的基波抑制为 25 至 33 dB。由于采用行波结构，无需巴伦，芯片尺寸小至 443×536μm2443 \times536\,\,\mu \text{m}^{2}。