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7.4-mW, 22.7鈥29.7 GHz CMOS VGA With 23.7 dB (19.2 to 鈭4.5 dB) Gain Tuning Range and 3.26 dB NFavg
IEEE Microwave and Wireless Components Letters ( IF 2.9 ) Pub Date : 4-26-2022 , DOI: 10.1109/lmwc.2022.3167707
Jin-Fa Chang, Yo-Sheng Lin

We demonstrate a low-power (PD)(P_{D}) , low-noise, and high-gain 22.7–29.7-GHz variable-gain amplifier (VGA) in 90-nm CMOS for 28-GHz 5G systems. Low PDP_{D} and wide gain tuning range are achieved due to the use of the self-body-to-drain bias through body-floating resistance and the current-reused topology with auxiliary current steering. Input noise matching and body-floating techniques are used for noise figure (NF) enhancement. VGA consumes 7.4 mW and achieves S21S_{21} tuning range of 23.7 dB (19.2 to −4.5 dB) at 26 GHz. At VctrlV_{\mathrm {ctrl}} of 0 V (i.e., maximum gain), VGA attains S21S_{21} of 16.2–19.2 dB for 22.7–29.7 GHz [i.e., 3-dB bandwidth ( f3dBf_{3\,\mathrm {dB}} ) equal to 7 GHz], minimum noise figure (NF min_{\mathrm {min}} ) of 2.39 dB at 26.5 GHz, average NF (NF avg_{\mathrm {avg}} ) of 2.76 dB for 22.5–29.5 GHz, small group delay (GD) variation of ± 14.7 ps for 18–30 GHz (i.e., decent phase linearity), and input third-order intercept point (IIP3) of −12.7 dBm at 28 GHz. The chip area is 0.383 mm2.
更新日期:2024-08-26
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