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An Injection-Locked Ring-Oscillator-Based Fractional-N Digital PLL Supporting BLE Frequency Modulation
IEEE Journal of Solid-State Circuits ( IF 4.6 ) Pub Date : 2022-03-17 , DOI: 10.1109/jssc.2022.3154752
Yuming He 1 , Johan van den Heuvel 1 , Paul Mateman 1 , Erwin Allebes 1 , Stefano Traferro 1 , Johan Dijkhuis 1 , Keigo Bunsen 2 , Peter Vis 1 , Arjan Breeschoten 1 , Yao-Hong Liu 1 , Tomohiro Matsumoto 2 , Christian Bachmann 1
Affiliation  

This article presents an injection-locked (IL) ring-oscillator-based fractional- N{N} digital phase locked loop (DPLL) supporting Bluetooth low energy (BLE) frequency modulation with an frequency-shift keying (FSK) error between 2.4% and 3.3%. As the fractional spur cannot be suppressed by IL-DPLL, this work proposes a random edge injection (REI) to reduce the spur. This technique also speeds up the convergence time of gain calibration of the digital-to-time converter (DTC). Furthermore, the proposed background calibration schemes allow the DPLL to achieve stable performance across all BLE channels, including both integer- N{N} and fractional- N{N} channels. This work was fabricated in the 40-nm CMOS technology occupying a 0.09-mm2 area. A fractional spur of −44 dBc and a reference spur of are achieved while consuming 2.76 mW when REI is activated. The background calibrations also ensure stable performance across BLE channels.

中文翻译:


基于注入锁定环形振荡器的分数 N 数字 PLL,支持 BLE 频率调制



本文介绍了一种基于注入锁定 (IL) 环形振荡器的分数 N{N} 数字锁相环 (DPLL),支持蓝牙低功耗 (BLE) 频率调制,频移键控 (FSK) 误差在 2.4% 之间和3.3%。由于 IL-DPLL 无法抑制分数杂散,因此本工作提出了随机边缘注入 (REI) 来减少杂散。该技术还加快了数字时间转换器 (DTC) 增益校准的收敛时间。此外,所提出的后台校准方案允许 DPLL 在所有 BLE 通道(包括整数 N{N} 和小数 N{N} 通道)上实现稳定的性能。该作品采用 40 nm CMOS 技术制造,面积为 0.09 mm2。当 REI 激活时,可实现 -44 dBc 的分数杂散和 的参考杂散,同时消耗 2.76 mW。后台校准还确保 BLE 通道的稳定性能。
更新日期:2022-03-17
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