Clock distribution is central to digital technology and influences circuit performance, interconnect overhead and efficiency. However, ensuring reliable clock distribution across large digital systems with low skew and jitter—and in the presence of device variations and thermal noise—is a design challenge. Here we report a superconducting metamaterial resonant clock network that can provide energy-efficient power delivery to large superconducting digital systems. The resonant clock network is based on a metamaterial design with an infinite-wavelength zeroth-order resonance mode and utilizes the ultralow Joule loss of superconductors at microwave frequencies. With this approach, we perform S-parameter measurements for a 10 GHz design and validate a digital reciprocal quantum logic circuit with 48,000 junctions operating at 3.5 GHz. The network supports uniform power distribution with less than 1 dB variation across a 3 × 3 mm² active chip area and around 30% power efficiency. Static power dissipation is 28 μW, which is similar to that of active devices.

时钟分配是数字技术的核心，影响电路性能、互连开销和效率。然而，在存在器件变化和热噪声的情况下，确保在具有低偏移和抖动的大型数字系统中实现可靠的时钟分配是一项设计挑战。在这里，我们报告了一种超导超材料谐振时钟网络，可以为大型超导数字系统提供高能效的电力传输。谐振时钟网络基于具有无限波长零阶谐振模式的超材料设计，并利用超导体在微波频率下的超低焦耳损耗。通过这种方法，我们对 10 GHz 设计执行 S 参数测量，并验证具有 48,000 个结点在 3.5 GHz 下运行的数字倒易量子逻辑电路。²有源芯片面积和大约 30% 的电源效率。静态功耗为 28 μW，与有源器件相似。