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Modelling and Simulation of Ge Absorber-based Tunnel Field-Effect Phototransistor at 1550 nm
IETE Technical Review ( IF 2.5 ) Pub Date : 2022-03-23 , DOI: 10.1080/02564602.2022.2046513
Manisha Khurana 1 , Upasana Kardam 1 , Manoj Saxena 2 , Mridula Gupta 1
Affiliation  

In this article, a semi-analytical model for germanium absorber-based SOI-tunnel field-effect phototransistor at 1550 nm has been proposed. The model works efficiently for a wide range of intensities i.e. 10−2 to 102 µW/µm2 under the application of a very low gate voltage of 0.54 V. Exhaustive simulations using numerical ATLAS 2D device simulation tool with LUMNINOUS optical module have been carried out to propose the merit of tunnel field-effect transistors (TFETs) over metal oxide semiconductor field effect transistors (MOSFETs) for optical applications. The proposed TFET design provides a way to assist the ultrasensitive optical interconnects at a very low gate bias of 0.54 V with a maximum sensitivity of 1.5 × 107, responsivity of 270 mA/W, and detectivity of 3.5 × 1012 Jones at low power density of 0.01 µW/µm2. The TFET performance has further been improved by introducing a heavily doped pocket in between source and channel, which serves as a potential alternative for photodetector applications. The proposed pocket-doped TFET design offers significant improvements in device optical response with optimized sensitivity of 4.1 × 107, a responsivity of 772 mA/W, and a detectivity of 9.9 × 1012 Jones at an optical intensity of 0.01 µW/µm2, gate bias of 0.45 V, and drain voltage of 0.6 V. Transient analysis has been carried out to optimize the response time of the phototransistor for both Ge-gated conventional TFET and pocket-doped architecture and the fall time of ∼0.22 ms has been achieved.



中文翻译:

基于 Ge 吸收体的隧道场效应光电晶体管在 1550 nm 的建模与仿真

在本文中,提出了基于锗吸收体的 SOI 隧道场效应光电晶体管在 1550 nm 的半解析模型。在 0.54 V 的极低栅极电压的应用下,该模型适用于各种强度,10 −2至 10 2  µW/µm 2 。使用带有 LUMNINOUS 光学模块的数值 ATLAS 二维器件仿真工具进行了详尽的仿真提出在光学应用中隧道场效应晶体管 (TFET) 优于金属氧化物半导体场效应晶体管 (MOSFET) 的优点。拟议的 TFET 设计提供了一种方法,可在 0.54 V 的极低栅极偏置下辅助超灵敏光学互连,最大灵敏度为 1.5 × 10 7,响应度为 270 mA/W,在 0.01 µW/µm 2的低功率密度下,检测率为 3.5 × 10 12 Jones 。通过在源极和沟道之间引入重掺杂口袋,TFET 性能得到进一步提高,这可作为光电探测器应用的潜在替代方案。拟议的口袋掺杂 TFET 设计显着改善了器件光学响应,优化的灵敏度为 4.1 × 10 7 ,响应率为 772 mA/W,在光强度为 0.01 µW/µm 2时的探测率为 9.9 × 10 12琼斯,栅极偏置为 0.45 V,漏极电压为 0.6 V。已进行瞬态分析以优化 Ge 门控传统 TFET 和口袋掺杂架构的光电晶体管的响应时间,下降时间约为 0.22 ms实现了。

更新日期:2022-03-23
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