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Analytical Loss Model for Three-Phase 1200V SiC MOSFET Inverter Drive System Utilizing Miller Capacitor-Based dv/dt-Limitation
IEEE Open Journal of Power Electronics Pub Date : 2022-01-20 , DOI: 10.1109/ojpel.2022.3143995
Michael Haider 1 , Simon Fuchs 1 , Grayson Zulauf 1 , Dominik Bortis 1 , Johann W. Kolar 1 , Yasuo Ono 2
Affiliation  

Next-generationVariable Speed Drive (VSD) systems utilize SiC MOSFETs to achieve both high efficiency through reduced bridge-leg losses and high power density through an order-of-magnitude increase in switching frequency or reduction of the DC-link capacitance. These systems, however, must contend with the high voltage slew rate ( $\text{d} {v}_\text{DS}/\text{d}t$ ) of these next-generation power semiconductors, especially in the context of protecting the motor from partial discharge phenomena, surge voltages from cable reflections, and unequal distribution of the voltage across motor windings. We assess the attractiveness of an external Miller capacitor across the bridge-leg power semiconductors to limit the maximum voltage slew rate in a system. To evaluate this technique, we propose a maximum $\text{d}v_\text{DS}/\text{d}t$ model, finding that the maximum turn-on slew rate occurs at Zero-Current Switching (ZCS) with an increase in $\text{d}v_\text{DS}/\text{d}t$ as the device junction temperature increases. During the turn-off transition, the applied $\text{d}v_\text{DS}/\text{d}t$ saturates at a particular current. We then find a switching loss model, arriving at a piecewise-linear dependence of bridge-leg switching losses on current under $\text{d}v_\text{DS}/\text{d}t$ -limited conditions, a finding that runs counter to the widely-utilized quadratic current dependence. The proposed models are validated on a SiC MOSFET bridge-leg designed for a $10 \,\mathrm{k}\mathrm{W}$ $800 \,\mathrm{V}$ DC-link Variable Speed Drive (VSD) system with a switching frequency of $16 \,{\mathrm kHz}$ , where the Miller capacitor-based technique achieves lower losses (for the same maximum $\text{d}v_\text{DS}/\text{d}t$ ) than a gate resistor-only $\text{d}v_\text{DS}/\text{d}t$ limiting approach. This SiC MOSFETbridge-leg achieves peak calculated bridge-leg efficiencies of $99.2 \,\%$ for a $\text{d}v_\text{DS}/\text{d}t$ limitation of $10 \,\mathrm{V}\mathrm{/}\mathrm{n}\mathrm{s}$ and $99.4 \,\%$ for a limit of $15 \,\mathrm{V}\mathrm{/}\mathrm{n}\mathrm{s}$ .

中文翻译:

利用基于米勒电容器的 dv/dt 限制的三相 1200V SiC MOSFET 逆变器驱动系统的分析损耗模型

下一代变速驱动 (VSD) 系统利用 SiC MOSFET 通过减少桥臂损耗来实现高效率,并通过开关频率增加一个数量级或减少直流链路电容来实现高功率密度。然而,这些系统必须应对高压摆率( $\text{d} {v}_\text{DS}/\text{d}t$ ) 这些下一代功率半导体,特别是在保护电机免受局部放电现象、电缆反射产生的浪涌电压以及电机绕组电压分布不均的情况下。我们评估了跨桥臂功率半导体的外部米勒电容器的吸引力,以限制系统中的最大电压转换速率。为了评估这项技术,我们提出了一个最大值$\text{d}v_\text{DS}/\text{d}t$模型,发现最大开启压摆率发生在零电流开关 (ZCS) 与增加$\text{d}v_\text{DS}/\text{d}t$随着器件结温的升高。在关断过渡期间,应用$\text{d}v_\text{DS}/\text{d}t$在特定电流下饱和。然后我们找到一个开关损耗模型,得出桥臂开关损耗对电流的分段线性关系$\text{d}v_\text{DS}/\text{d}t$ - 有限条件,这一发现与广泛使用的二次电流依赖性背道而驰。所提出的模型在设计用于$10 \,\mathrm{k}\mathrm{W}$ $800 \,\mathrm{V}$直流链路变速驱动 (VSD) 系统,开关频率为$16 \,{\mathrm kHz}$ ,其中基于米勒电容器的技术实现了更低的损耗(对于相同的最大值$\text{d}v_\text{DS}/\text{d}t$ ) 比仅栅极电阻器$\text{d}v_\text{DS}/\text{d}t$限制方法。该 SiC MOSFET 桥臂实现峰值计算的桥臂效率$99.2 \,\%$为一个$\text{d}v_\text{DS}/\text{d}t$的限制$10 \,\mathrm{V}\mathrm{/}\mathrm{n}\mathrm{s}$$99.4 \,\%$为限$15 \,\mathrm{V}\mathrm{/}\mathrm{n}\mathrm{s}$ .
更新日期:2022-01-20
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