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Single-Rail Adiabatic Logic for Energy-Efficient and CPA-Resistant Cryptographic Circuit in Low-Frequency Medical Devices
IEEE Open Journal of Nanotechnology ( IF 1.8 ) Pub Date : 2021-12-14 , DOI: 10.1109/ojnano.2021.3135364
Amit Degada 1 , Himanshu Thapliyal 2
Affiliation  

Designing energy-efficient and secure cryptographic circuits in low-frequency medical devices are challenging due to low-energy requirements. Also, the conventional CMOS logic-based cryptographic circuits solutions in medical devices can be vulnerable to side-channel attacks (e.g. correlation power analysis (CPA)). In this article, we explored single-rail Clocked CMOS Adiabatic Logic (CCAL) to design an energy-efficient and secure cryptographic circuit for low-frequency medical devices. The performance of the CCAL logic-based circuits was checked with a power clock generator (2N2P-PCG) integrated into the design for the frequency range of 50 kHz to 250 kHz. The CCAL logic gates show an average of approximately 48% energy-saving and more than 95% improvement in security metrics performance compared to its CMOS logic gate counterparts. Further, the CCAL based circuits are also compared for energy-saving performance against dual-rail adiabatic logic, 2-EE-SPFAL, and 2-SPGAL. The adiabatic CCAL gates save on an average of 55% energy saving compared to 2-EE-SPFAL and 2-SPGAL over the frequency range of 50 kHz to 250 kHz. To check the efficacy of CCAL to design a larger cryptographic circuit, we implemented a case-study design of a Substitution-box (S-box) of popular lightweight PRESENT-80 encryption. The case-study implementation (2N2P-PCG integrated into the design) using CCAL shows more than 95% energy saving compared to CMOS for the frequency 50 kHz to 125 kHz and around 60% energy saving at frequency 250 kHz. At 250 kHz, compared to the dual-rail adiabatic designs of S-box based on 2-EE-SPFAL and 2-SPGAL, the CCAL based S-box shows 32.67% and 11.21% of energy savings, respectively. Additionally, the CCAL logic gate structure requires a lesser number of transistors compared to dual-rail adiabatic logic. The case-study implementation using CCAL saves 45.74% and 34.88% transistor counts compared to 2-EE-SPFAL and 2-SPGAL. The article also presents the effect of varying tank capacitance in 2N2P-PCG over energy efficiency and security performance. The CCAL based case-study was also subjected against CPA. The CCAL-based S-box case study successfully protects the revelation of the encryption key against the CPA attack, However, the key was revealed in CMOS-based case-study implementation.

中文翻译:


用于低频医疗设备中节能且抗 CPA 加密电路的单轨绝热逻辑



由于低能耗要求,在低频医疗设备中设计节能且安全的加密电路具有挑战性。此外,医疗设备中传统的基于 CMOS 逻辑的加密电路解决方案可能容易受到旁道攻击(例如相关功率分析 (CPA))。在本文中,我们探索了单轨时钟 CMOS 绝热逻辑 (CCAL),为低频医疗设备设计节能且安全的加密电路。基于 CCAL 逻辑的电路的性能通过集成到设计中的电源时钟发生器 (2N2P-PCG) 进行检查,频率范围为 50 kHz 至 250 kHz。与 CMOS 逻辑门同类产品相比,CCAL 逻辑门平均节能约 48%,安全指标性能提高 95% 以上。此外,还将基于 CCAL 的电路与双轨绝热逻辑、2-EE-SPFAL 和 2-SPGAL 的节能性能进行了比较。在 50 kHz 至 250 kHz 的频率范围内,与 2-EE-SPFAL 和 2-SPGAL 相比,绝热 CCAL 门平均节能 55%。为了检查 CCAL 设计更大加密电路的有效性,我们对流行的轻量级 PRESENT-80 加密的替换盒 (S-box) 进行了案例研究设计。使用 CCAL 的案例研究实施(2N2P-PCG 集成到设计中)显示,与 CMOS 相比,在频率 50 kHz 至 125 kHz 时节能超过 95%,在频率 250 kHz 时节能约 60%。在 250 kHz 时,与基于 2-EE-SPFAL 和 2-SPGAL 的 S-box 双轨绝热设计相比,基于 CCAL 的 S-box 分别节能 32.67% 和 11.21%。 此外,与双轨绝热逻辑相比,CCAL 逻辑门结构需要更少数量的晶体管。与 2-EE-SPFAL 和 2-SPGAL 相比,使用 CCAL 的案例研究实现可节省 45.74% 和 34.88% 的晶体管数量。本文还介绍了 2N2P-PCG 中不同储能电容对能源效率和安全性能的影响。基于 CCAL 的案例研究也针对 CPA。基于 CCAL 的 S-box 案例研究成功地保护了加密密钥的泄露免受 CPA 攻击,但是,该密钥在基于 CMOS 的案例研究实现中被泄露。
更新日期:2021-12-14
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