Safety-critical systems have to follow extremely high dependability requirements as specified in the standards for automotive, air, and space applications. The required high fault coverage at runtime is usually obtained by a combination of concurrent error detection or correction and periodic tests within rather short time intervals. The concurrent scheme ensures the integrity of computed results while the periodic test has to identify potential aging problems and to prevent any fault accumulation which may invalidate the concurrent error detection mechanism. Such periodic built-in self-test (BIST) schemes are already commercialized for memories and for random logic. The paper at hand extends this approach to interconnect structures. A BIST scheme is presented which targets interconnect defects before they will actually affect the system functionality at nominal speed. A BIST schedule is developed which significantly reduces aging caused by electromigration during the lifetime application of the periodic test.

安全关键系统必须遵循汽车、航空和航天应用标准中规定的极高可靠性要求。运行时所需的高故障覆盖率通常是通过在相当短的时间间隔内同时进行错误检测或纠正以及定期测试的组合来获得的。并发方案确保计算结果的完整性，而定期测试必须识别潜在的老化问题并防止任何可能使并发错误检测机制无效的故障累积。这种周期性的内置自检 (BIST) 方案已经商业化用于存储器和随机逻辑。手头的论文将这种方法扩展到互连结构。提出了一种 BIST 方案，该方案在互连缺陷以标称速度实际影响系统功能之前将其作为目标。制定了 BIST 计划，可显着减少在定期测试的寿命应用期间由电迁移引起的老化。