In this article, a distributed-swing-boosting and harmonic-impedance-expanding multi-core oscillator is proposed to achieve low phase noise and high figure-of-merit (FoM), simultaneously. First, a distributed-coupling multi-core topology is introduced to reduce the chip area with no mode ambiguity. Then, the distributed-swing-boosting and harmonic-impedance-expanding structure is developed to boost the gate swing and square-like waveform of VDSV_{\text {DS}} . The common-mode (CM) resonances around the second harmonic and the differential-mode (DM) resonances around the third harmonic are utilized to suppress the flicker noise up-conversion and achieve harmonic shaping. Meanwhile, the dual-resonance response expands the high-impedance frequency ranges around the harmonics, and thus, the effect of harmonic shaping can be obtained over a wide frequency range. Fabricated in a 40-nm CMOS process, the oscillator measured exhibits low phase noise and high FoM simultaneously with a compact chip size. The minimum phase noise is −138.9 dBc/Hz at the 1-MHz offset, corresponding to an FoM of 195.1 dBc/Hz. The 1/ f3f^{3} phase noise corner is 100–130 kHz over the 26.6% tuning range.

中文翻译：

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采用谐波阻抗扩展技术的低相位噪声、高 FoM 分布式摆幅升压多核振荡器


在本文中，提出了一种分布式摆幅升压和谐波阻抗扩展多核振荡器，以同时实现低相位噪声和高品质因数（FoM）。首先，引入分布式耦合多核拓扑，以减少芯片面积，同时避免模式模糊。然后，开发了分布式摆幅升压和谐波阻抗扩展结构，以提高 VDSV_{\text {DS}} 的栅极摆幅和方形波形。利用二次谐波周围的共模（CM）谐振和三次谐波周围的差模（DM）谐振来抑制闪烁噪声上变频并实现谐波整形。同时，双谐振响应扩大了谐波周围的高阻抗频率范围，从而可以在较宽的频率范围内获得谐波整形的效果。所测量的振荡器采用 40 nm CMOS 工艺制造，具有低相位噪声和高 FoM，同时芯片尺寸紧凑。 1 MHz 偏移处的最小相位噪声为 −138.9 dBc/Hz，对应的 FoM 为 195.1 dBc/Hz。 1/ f3f^{3} 相位噪声角在 26.6% 调谐范围内为 100–130 kHz。