A low-power IEEE 802.15.4z high-rate PHY (HRP) compatible coherent transmitter is described. The proposed transmitter uses a digital polar architecture with fixed amplitude steps in the power amplifier and asynchronous time-discrete pulse shaping. The pulse-shaping unit consists of a finite-impulse response (FIR) filter using current-starved inverter-based delay taps that can be calibrated on-chip. An injection-locked ring oscillator (ILRO)-based frequency synthesis enables wideband operation from 3- to 10-GHz frequency bands. The ILRO also allows for duty-cycled coherent mode operation with 2–4-ns phase locking time and binary phase modulation is applied directly on the oscillator. The on-chip digital front end enables duty cycling (DC) of analog front-end modules with a granularity of 2 ns. Implemented in 28-nm CMOS process, this chip is measured to consume 4.9-mW power in nominal mode with IEEE 802.15.4z high pulse repetition frequency (HPRF) compatible data rate of 6.81 Mb/s compliant with major spectrum mask regulations for channels 5 and 9. With DC of the oscillator enabled in the energy-efficient mode, a power consumption of 430 μW430~\mu \text{W} is achieved for packets compatible with legacy pulse-position-modulated IEEE 802.15.4a standard with a data rate of 27.2 Mb/s.

中文翻译：

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采用 28 nm CMOS 的 IR-UWB IEEE 802.15.4z 兼容相干异步极性发射机


描述了一种低功耗 IEEE 802.15.4z 高速 PHY (HRP) 兼容相干发射机。所提出的发射机采用数字极性架构，在功率放大器中具有固定幅度步长和异步时间离散脉冲整形。脉冲整形单元由有限脉冲响应 (FIR) 滤波器组成，该滤波器使用可在片上校准的基于电流匮乏的逆变器延迟抽头。基于注入锁定环形振荡器 (ILRO) 的频率合成可实现 3 至 10 GHz 频段的宽带操作。 ILRO 还允许具有 2–4 ns 锁相时间的占空比相干模式操作，并且二进制相位调制直接应用于振荡器。片上数字前端支持模拟前端模块的占空比 (DC)，粒度为 2 ns。该芯片采用 28 nm CMOS 工艺实现，经测量在标称模式下消耗 4.9 mW 功耗，IEEE 802.15.4z 高脉冲重复频率 (HPRF) 兼容数据速率为 6.81 Mb/s，符合通道 5 的主要频谱模板规定9. 在节能模式下启用振荡器的 DC 后，对于与传统脉冲位置调制 IEEE 802.15.4a 标准兼容的数据包，可实现 430 μW430~\mu \text{W} 的功耗。速率为 27.2 Mb/s。