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Optical RAM Row With 20 Gb/s Optical Word Read/Write
Journal of Lightwave Technology ( IF 4.7 ) Pub Date : 2021-09-16 , DOI: 10.1109/jlt.2021.3112913
Theonitsa Alexoudi , Christos Pappas , Theodoros Moschos , George Mourgias-Alexandris , Konstantinos Fotiadis , Nikos Pleros , Christos Vagionas

During the past years, optical memories have emerged as the main way to enable fast access times and increased memory bandwidth in synergy with optical interconnections. The migration, however, to fully functional and practical optical RAMs and cache memories will require an additional yet essential step: Optical memories have to get organized into an optical memory subsystem for delivering seamless cooperation between storage and peripheral decoding units, exploiting also the wavelength dimension for efficient RAM architectural layouts. In this paper we demonstrate the first experimentally verified Wavelength Division Multiplexing (WDM) -enabled optical RAM Row subsystem comprising both the peripheral decoding circuitry and a 4-bit optical RAM Row for storing 20Gb/s 4-bit WDM-formatted optical data words. The proposed scheme comprises a single shared multi-λ Semiconductor Optical Amplifier Mach-Zehnder Interferometer (SOA-MZI) Access Gate (AG) for granting access-control to the complete RAM Row, a passive Column Decoder (CD) that directs the incoming WDM-formatted data words to the respective RAM cells that are in turn based on four broadband Indium Phosphide (InP) photonic integrated Flip-Flops (FFs). Our experimental verification firstly investigates the broadband capability of the elementary InP monolithic RAM cell at 5 Gb/s, revealing error-free Write functionality with <4.5 dB power penalty across the whole C-band confirming in this way the potential of efficient scaling to multi-cell WDM-enabled RAMs. Then, experimental validation of the complete 4-bit WDM-enabled optical RAM Row with 20 Gb/s WDM-formatted data words is performed, featuring simultaneous Access gating, decoding and storage operation for all four RAM cells, having a peak power penalty within the range of [4.6-5.6] dB for Write and [2.2-2.9] dB for Read functionalities, respectively, at a Bit Error Rate of 10 −9 .

中文翻译:

具有 20 Gb/s 光学字读取/写入速度的光学 RAM 行

在过去几年中,光存储器已成为实现快速访问时间和与光互连协同增加存储器带宽的主要方式。然而,向功能齐全且实用的光学 RAM 和高速缓存存储器的迁移将需要一个额外但必不可少的步骤:必须将光学存储器组织成一个光学存储器子系统,以便在存储和外围解码单元之间实现无缝协作,同时利用波长维度用于高效的 RAM 架构布局。在本文中,我们展示了第一个经过实验验证的支持波分复用 (WDM) 的光学 RAM 行子系统,该子系统包括外围解码电路和用于存储 20Gb/s 4 位 WDM 格式光学数据字的 4 位光学 RAM 行。提议的方案包括一个共享的多波长半导体光放大器 Mach-Zehnder 干涉仪 (SOA-MZI) 访问门 (AG),用于授予对完整 RAM 行的访问控制权,一个无源列解码器 (CD),用于引导传入的 WDM - 格式化数据字到相应的 RAM 单元,这些单元又基于四个宽带磷化铟 (InP) 光子集成触发器 (FF)。我们的实验验证首先研究了 5 Gb/s 的基本 InP 单片 RAM 单元的宽带能力,揭示了在整个 C 波段具有 <4.5 dB 功率损失的无错误写入功能,以这种方式确认了有效扩展到多-cell 支持 WDM 的 RAM。然后,对具有 20 Gb/s WDM 格式数据字的完整 4 位启用 WDM 的光学 RAM 行进行实验验证, -9 .
更新日期:2021-11-12
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