We derive a complete set of expressions for the MOSFET gate and drain power spectral densities due to elastic and inelastic trapping/detrapping of channel carriers into the gate dielectric. Our calculations explain trapping/detrapping noise (TDN) in various FET operating regions and highlight trap’s position-dependent terms, often neglected in the literature, which are instead important for devices with thin gate dielectrics. Furthermore, we show that TDN has a contribution to the gate current noise, correlated with the drain current fluctuations and we highlight the role of the transfer function between channel charge fluctuations and drain current on the noise characteristics. The model expressions are carefully validated by comparison with 2-D and 3-D TCAD simulations of scaled MOSFETs with different architectures (bulk, fully depleted-silicon-on-insulator (FD-SOI), FinFET), channel, and gate materials. Besides shedding new light on TDN, the results could enable trap density extraction from experimental samples with improved accuracy and pave the way to complete and accurate compact models for TDN in MOSFETs.

中文翻译：

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全面的栅极和漏极捕获/去捕获噪声模型及其对薄电介质 MOSFET 的影响


由于沟道载流子弹性和非弹性俘获/去俘获到栅极电介质中，我们推导了 MOSFET 栅极和漏极功率谱密度的完整表达式。我们的计算解释了各种 FET 工作区域中的俘获/去俘获噪声 (TDN)，并强调了陷阱的位置相关项，这些项在文献中经常被忽视，但对于具有薄栅极电介质的器件来说却很重要。此外，我们还表明 TDN 对栅极电流噪声有贡献，与漏极电流波动相关，并且我们强调了沟道电荷波动和漏极电流之间的传递函数对噪声特性的作用。通过与具有不同架构（体、全耗尽绝缘体上硅 (FD-SOI)、FinFET）、沟道和栅极材料的按比例缩放 MOSFET 的 2D 和 3D TCAD 仿真进行比较，仔细验证了模型表达式。除了为 TDN 提供新的线索外，这些结果还可以提高从实验样品中提取陷阱密度的精度，并为 MOSFET 中完整且准确的 TDN 紧凑模型铺平道路。