The implementation of current deep learning training algorithms is power-hungry, due to data transfer between memory and logic units. Oxide-based resistive random access memories (RRAMs) are outstanding candidates to implement in-memory computing, which is less power-intensive. Their weak RESET regime is particularly attractive for learning, as it allows tuning the resistance of the devices with remarkable endurance. However, the resistive change behavior in this regime suffers from many fluctuations and is particularly challenging to model, especially in a way compatible with tools used for simulating deep learning. In this work, we present a model of the weak RESET process in hafnium oxide RRAM and integrate this model within the PyTorch deep learning framework. Validated on experiments on a hybrid CMOS/RRAM technology, our model reproduces both the noisy progressive behavior and the device-to-device (D2D) variability. We use this tool to train binarized neural networks (BNNs) for the MNIST handwritten digit recognition task and the CIFAR-10 object classification task. We simulate our model with and without various aspects of device imperfections to understand their impact on the training process and identify that the D2D variability is the most detrimental aspect. The framework can be used in the same manner for other types of memories to identify the device imperfections that cause the most degradation, which can, in turn, be used to optimize the devices to reduce the impact of these imperfections.

中文翻译：

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用于深度学习框架的 HfOx 电阻存储器中的弱重置过程模型


由于内存和逻辑单元之间的数据传输，当前深度学习训练算法的实现非常耗电。氧化物电阻式随机存取存储器 (RRAM) 是实现内存计算的最佳候选者，其功耗较低。它们的弱复位机制对于学习特别有吸引力，因为它允许以卓越的耐用性调整器件的电阻。然而，这种状态下的电阻变化行为会受到许多波动的影响，并且建模特别具有挑战性，尤其是与用于模拟深度学习的工具兼容的方式。在这项工作中，我们提出了氧化铪 RRAM 中弱 RESET 过程的模型，并将该模型集成到 PyTorch 深度学习框架中。我们的模型经过混合 CMOS/RRAM 技术实验的验证，可重现噪声渐进行为和器件间 (D2D) 变异性。我们使用此工具来训练用于 MNIST 手写数字识别任务和 CIFAR-10 对象分类任务的二值化神经网络 (BNN)。我们模拟了有或没有设备缺陷的各个方面的模型，以了解它们对训练过程的影响，并确定 D2D 可变性是最有害的方面。该框架可以以相同的方式用于其他类型的存储器，以识别导致最严重退化的设备缺陷，进而可以用于优化设备以减少这些缺陷的影响。