This article presents a novel stepped suspended gate field-effect transistor (SSGFET) array-based z{z} -axis accelerometer with an enhanced detection range. The stepped gate electrode structure of SGFET aids in extending the stable driving range beyond 33.33% of the initial air gap. The stable driving range is extended to 50% of the initial air gap with ~90% increase in the pull-in voltage. Mechanical, electrical, and electromechanical analytical models are developed. These models are validated through microelectromechanical systems (MEMS) simulations using CoventorMP and transistor simulations in Synopsys TCAD. An SSGFET-based common source (CS) amplifier with diode-connected p-MOSFET load is designed and simulated in Cadence Virtuoso using the lookup table (LUT) approach. The zz -axis accelerometer exhibits a sensitivity of 38 (mV/g) with a supply voltage of 3.3 V for a dynamic range (DR) of ±6 g with the nonlinearity of about 5.3% comparedtoSGFETswith a planar gate electrode,whichcan detect up to ±4 g with the same sensitivity. The 3-dB bandwidth of the accelerometer is 412 Hz with a noise-limited resolution of 109.31 μ\mu g/(Hz)1/2. This article also presents a detailed analysis of the relation between the number of gate fragments, the pull-in voltage, stable driving range, and the DR along with a feasible fabrication integration plan.

中文翻译：

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具有阶梯式悬栅 FET 阵列的 CMOS-MEMS 加速度计：设计与分析


本文介绍了一种新颖的基于阶梯式悬浮栅场效应晶体管 (SSGFET) 阵列的 z{z} 轴加速度计，具有增强的检测范围。 SGFET 的阶梯式栅电极结构有助于将稳定驱动范围扩展至初始气隙的 33.33% 以上。稳定驱动范围扩展至初始气隙的 50%，吸合电压增加约 90%。开发了机械、电气和机电分析模型。这些模型通过使用 CoventorMP 的微机电系统 (MEMS) 仿真和 Synopsys TCAD 中的晶体管仿真进行验证。使用查找表 (LUT) 方法在 Cadence Virtuoso 中设计并仿真具有二极管连接 p-MOSFET 负载的基于 SSGFET 的共源 (CS) 放大器。 zz 轴加速度计的灵敏度为 38 (mV/g)，电源电压为 3.3 V，动态范围 (DR) 为 ±6 g，与具有平面栅电极的 SGFET 相比，非线性度约为 5.3%，可检测高达±4 g，具有相同的灵敏度。加速度计的 3dB 带宽为 412Hz，噪声限制分辨率为 109.31μμg/(Hz)1/2。本文还详细分析了栅极碎片数量、吸合电压、稳定驱动范围和DR之间的关系，并提出了可行的制造集成方案。