Conductance of thin (18nm) silicon-on-insulator (SOI) metal-oxide-semiconductor field-effect transistor is investigated from the viewpoint of metal insulator transition (MIT). Conductance characteristics taken in the parameter space defined by the front- and back-gate voltages in a temperature range on the order of 10K reveal that the critical conductance G _C, separating the metallic and insulating states, varies with the gate voltages. In particular, it is found that G _C of the double (front and back) channel mode is not a simple sum of G _C for the two single (front or back) channel modes, but becomes lower than the sum. This is a unique feature of the MIT in thin SOIs, and strongly suggests that modulation of the electron wavefunction due to the vertical confinement affects the MIT properties in thin SOIs.

从金属绝缘体转变 (MIT) 的角度研究了薄 (18nm) 绝缘体上硅 (SOI) 金属氧化物半导体场效应晶体管的电导。在 10K 数量级的温度范围内由前栅电压和后栅电压定义的参数空间中的电导特性表明，分离金属和绝缘状态的临界电导G _C随栅电压而变化。特别地，发现G ^ _{C ^}双的（正面和背面）信道模式不是一个简单的总和ģ _Ç对于两个单（前或后）通道模式，但低于总和。这是薄 SOI 中 MIT 的独特特征，并且强烈表明由于垂直限制引起的电子波函数调制会影响薄 SOI 中的 MIT 特性。