In this work, the growth of CdS thin films by chemical bath deposition, and doping of the active layer by ion exchange method to fabricate a pseudo-metal–oxide–semiconductor field-effect transistor (Ψ-MOSFET) is reported. The introduction of copper ions as dopants in CdS films was employed to control the semiconductor bandgap and to produce transistors with adjustable channel currents. A cubic crystalline structure was corroborated by the preferential cubic (111) plane located at 2θ = 26.75°, detected on both CdS as-grown and Cu-doped CdS samples. The optical absorption edges were located near 515 and 505 nm, for as undoped and doped samples, respectively. In addition, the calculated bandgap presented a slight variation from 2.40 to 2.46 eV, after copper doping. To compare the performance between undoped and Cu-doped CdS films as active layer in thin film transistors, pseudo-MOSFET devices were manufactured. The surface morphology of the CdS films was studied by atomic force microscopy and electron microscopy. The SEM cross-section micrograph of the device showed a 110-nm-thick CdS layer deposited on SiO₂/Si–n substrates. Electrical characterization showed that the addition of Cu ions into CdS films produced improvements on the electrical behavior of the thin film transistors (TFTs). It was found that after Cu doping, the channel was modified from n to p-type. In addition, the resistivity increased along the transistor channel, while the calculated mobilities values of 0.02 and 6.6 cm²V⁻¹S⁻¹ were obtained for p-type and n-type TFTs, respectively. The threshold voltage value was − 6.4 eV and 5.64 eV corresponding to the Cu-doped and undoped devices, respectively. These results represent a promising contribution to the development of thin film transistors with the possibility of selecting the n-type or p-type behavior by the introduction of Cu ions and modifying its electrical properties.

在这项工作中，报道了通过化学浴沉积生长 CdS 薄膜，并通过离子交换方法掺杂有源层以制造伪金属氧化物半导体场效应晶体管（Ψ-MOSFET）。在 CdS 薄膜中引入铜离子作为掺杂剂被用来控制半导体带隙并生产具有可调沟道电流的晶体管。立方晶体结构由位于 2θ = 26.75° 的优先立方 (111) 平面证实，在 CdS 生长和 Cu 掺杂 CdS 样品上均检测到。对于未掺杂和掺杂的样品，光学吸收边缘分别位于 515 和 505 nm 附近。此外，在铜掺杂后，计算出的带隙从 2.40 到 2.46 eV 略有变化。为了比较未掺杂和掺杂 Cu 的 CdS 薄膜作为薄膜晶体管中的有源层的性能，制造了伪 MOSFET 器件。通过原子力显微镜和电子显微镜研究了 CdS 薄膜的表面形貌。该器件的 SEM 横截面显微照片显示 110 nm 厚的 CdS 层沉积在 SiO₂ /Si-n 衬底。电学表征表明，将 Cu 离子添加到 CdS 薄膜中改善了薄膜晶体管 (TFT) 的电学行为。发现Cu掺杂后，沟道由n型变为p型。此外，电阻率沿晶体管沟道增加，而计算的迁移率值为 0.02 和 6.6 cm ² V ^-1 S ^-1分别为 p 型和 n 型 TFT 获得。阈值电压值为 - 6.4 eV 和 5.64 eV，分别对应于 Cu 掺杂和未掺杂的器件。这些结果代表了对薄膜晶体管发展的有希望的贡献，可以通过引入 Cu 离子并改变其电特性来选择 n 型或 p 型行为。