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Modeling of single/multiple-bit upset effects on logic circuits applying Recurrent Neural Network
Microelectronics Journal ( IF 1.9 ) Pub Date : 2021-09-18 , DOI: 10.1016/j.mejo.2021.105249
Rasoul Farjaminezhad 1 , S. Safari 2 , Amir Masood Eftekhari Moghadam 1
Affiliation  

This paper proposes a Recurrent Neural Network (RNN) method for modeling transient fault effects on microelectronic devices. RNNs can estimate the impacts of glitches propagated through the circuits, fast and accurately. The estimation phase begins with the learning of behavior of the gates, i.e., NOT, AND, NAND, etc. Then, it provides fast and meticulous evaluations of the transient fault influences on circuits. Simulation results illustrate that the RNN develops the capabilities of conventional methods to explicit forms and impacts of transient faults. The findings accrued from RNN analysis of a 32-bit multiplier, demonstrate 2736x time speed-up with the 4.13 of accuracy loss in contrast with the HSPICE’s simulation time and output values. Additionally, in terms of estimating multiple transient fault effects on the 4-bit Multiply and Accumulate (MAC) circuit, compare to HSPICE’s, there is 16.69x time-acceleration with the 0.048 penalties in output signals’ values. The model considers the triple masking effects, re-convergent fan-out, and fault influences during several clock cycles.



中文翻译:

应用循环神经网络对逻辑电路的单/多位翻转效应建模

本文提出了一种循环神经网络 (RNN) 方法,用于对微电子设备上的瞬态故障影响进行建模。RNN 可以快速准确地估计通过电路传播的毛刺的影响。估计阶段开始于学习门的行为,即非、与、与非等。然后,它提供对电路瞬态故障影响的快速而细致的评估。仿真结果表明,RNN 开发了传统方法的能力,以明确瞬态故障的形式和影响。从 32 位乘法器的 RNN 分析得出的结果表明,与 HSPICE 的仿真时间和输出值相比,时间加速了 2736 倍,精度损失为 4.13。此外,在估计对 4 位乘法和累加 (MAC) 电路的多个瞬态故障影响方面,与 HSPICE 相比,有 16.69 倍的时间加速度,输出信号值有 0.048 的惩罚。该模型考虑了几个时钟周期内的三重屏蔽效应、重新收敛扇出和故障影响。

更新日期:2021-10-08
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